research-article

Embedded Memories: Progress and a Look into the Future

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Kiyoo ItohAuthors Info & Claims

IEEE Design & Test, Volume 28, Issue 1

Pages 10 - 13

https://doi.org/10.1109/MDT.2011.14

Published: 01 January 2011 Publication History

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Abstract

Memories are categorized as embedded memories (e-memories) and stand-alone memories. E-memories favor high speed rather than low cost. In addition, they must maintain compatibility with the logic process, because they must be cofabricated on the same chip as the logic. In contrast, stand-alone memories give the first priority to low cost and thus high density rather than high speed. Over the course of such memory development, memory designers have faced several challenges to cope with problems involved in the e-memories. This article discusses those challenges and examines the likely development path they will take.

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Khasanvis SHabib KRahman MLake RMoritz C(2015)Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory CircuitACM Journal on Emerging Technologies in Computing Systems10.1145/270023312:2(1-18)Online publication date: 2-Sep-2015
https://dl.acm.org/doi/10.1145/2700233
Khasanvis SHabib KRahman MNarayanan PLake RMoritz CMoritz C(2012)Ternary volatile random access memory based on heterogeneous graphene-CMOS fabricProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765505(69-76)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765505
Hänninen IBuckhanan WNiemier MBernstein GPalesi MMak T(2012)Network on metachip architecturesProceedings of the Fifth International Workshop on Network on Chip Architectures10.1145/2401716.2401719(5-10)Online publication date: 1-Dec-2012
https://dl.acm.org/doi/10.1145/2401716.2401719
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Embedded Memories: Progress and a Look into the Future

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Published In

IEEE Design & Test Volume 28, Issue 1

January 2011

86 pages

ISSN:0740-7475

Issue’s Table of Contents

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 January 2011

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Khasanvis SHabib KRahman MLake RMoritz C(2015)Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory CircuitACM Journal on Emerging Technologies in Computing Systems10.1145/270023312:2(1-18)Online publication date: 2-Sep-2015
https://dl.acm.org/doi/10.1145/2700233
Khasanvis SHabib KRahman MNarayanan PLake RMoritz CMoritz C(2012)Ternary volatile random access memory based on heterogeneous graphene-CMOS fabricProceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures10.1145/2765491.2765505(69-76)Online publication date: 4-Jul-2012
https://dl.acm.org/doi/10.1145/2765491.2765505
Hänninen IBuckhanan WNiemier MBernstein GPalesi MMak T(2012)Network on metachip architecturesProceedings of the Fifth International Workshop on Network on Chip Architectures10.1145/2401716.2401719(5-10)Online publication date: 1-Dec-2012
https://dl.acm.org/doi/10.1145/2401716.2401719
Park SGupta SMojumder NRaghunathan ARoy KGroeneveld PSciuto DHassoun S(2012)Future cache design using STT MRAMs for improved energy efficiencyProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228447(492-497)Online publication date: 3-Jun-2012
https://dl.acm.org/doi/10.1145/2228360.2228447

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Nanoscale Memories Pose Unique Challenges

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