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research-article

Automatic Test Program Generation: A Case Study

Published: 01 March 2004 Publication History

Abstract

Comprehensive coverage measurement should guide an effective testbench generation approach. Today, feedback from coverage to test generation often requires manual work; it is desirable to implement a framework that automates this feedback process. The authors propose a genetic-algorithm-based evolution framework for testbench generation. It enables small test programs to evolve and effectively capture target corner cases based on the feedback from coverage measurement.

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  • (2022)RemembERR: Leveraging Microprocessor Errata for Design Testing and ValidationProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00081(1126-1143)Online publication date: 1-Oct-2022
  • (2019)Scenario co-evolution for reinforcement learning on a grid world smart factory domainProceedings of the Genetic and Evolutionary Computation Conference10.1145/3321707.3321831(898-906)Online publication date: 13-Jul-2019
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Published In

cover image IEEE Design & Test
IEEE Design & Test  Volume 21, Issue 2
March 2004
87 pages

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 March 2004

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  • (2024)Automated CPU design by learning from input-output examplesProceedings of the Thirty-Third International Joint Conference on Artificial Intelligence10.24963/ijcai.2024/425(3843-3853)Online publication date: 3-Aug-2024
  • (2022)RemembERR: Leveraging Microprocessor Errata for Design Testing and ValidationProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00081(1126-1143)Online publication date: 1-Oct-2022
  • (2019)Scenario co-evolution for reinforcement learning on a grid world smart factory domainProceedings of the Genetic and Evolutionary Computation Conference10.1145/3321707.3321831(898-906)Online publication date: 13-Jul-2019
  • (2019)RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor TestingJournal of Electronic Testing: Theory and Applications10.1007/s10836-019-05825-935:5(695-714)Online publication date: 1-Oct-2019
  • (2018)Automation of Test Program Synthesis for Processor Post-silicon ValidationJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5709-x34:1(83-103)Online publication date: 1-Feb-2018
  • (2017)A Processor and Cache Online Self-Testing Methodology for OS-Managed PlatformIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.269850625:8(2346-2359)Online publication date: 24-Jul-2017
  • (2016)A Flexible Framework for the Automatic Generation of SBST ProgramsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.253880024:10(3055-3066)Online publication date: 1-Oct-2016
  • (2016)Observability solutions for in-field functional test of processor-based systemsMicroprocessors & Microsystems10.1016/j.micpro.2016.09.00247:PB(392-403)Online publication date: 1-Nov-2016
  • (2014)Advanced DiagnosisProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2602971(1-9)Online publication date: 1-Jun-2014
  • (2014)Parallel reconfiguration algorithms for mesh-connected processor arraysThe Journal of Supercomputing10.1007/s11227-014-1096-y69:2(610-628)Online publication date: 1-Aug-2014
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