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Stack Computers: An Introduction

Author:

D. M. BulmanAuthors Info & Claims

Computer, Volume 10, Issue 5

Pages 18 - 28

https://doi.org/10.1109/MC.1977.315869

Published: 01 May 1977 Publication History

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Abstract

Basic idea. The stack, or last-in first-out store, has become more familiar recently because many microprocessors have incorporated a stack in some form. In some microprocessors, the stack can only contain return addresses for subroutines; in others there are provisions for holding temporary data in the stack. The stack derives its name from the idea that items are placed on the "top," thus "pushing down" those items already on the stack. Items are removed from the top, "popping up" those items remaining on the stack.

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Hasegawa MShigei YGannon TAgerwala TFreiman C(1985)High-speed top-of-stack scheme for VLSI processorProceedings of the 12th annual international symposium on Computer architecture10.5555/327010.327129(48-54)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.5555/327010.327129
Hasegawa MShigei Y(1985)High-speed top-of-stack scheme for VLSI processorACM SIGARCH Computer Architecture News10.1145/327070.32712913:3(48-54)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.1145/327070.327129
De Prycker M(1982)A Performance Analysis of the Implementation of Addressing Methods in Block-Structured LanguagesIEEE Transactions on Computers10.1109/TC.1982.167596131:2(155-163)Online publication date: 1-Feb-1982
https://dl.acm.org/doi/10.1109/TC.1982.1675961
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Published In

Computer Volume 10, Issue 5

May 1977

280 pages

ISSN:0018-9162

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 May 1977

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Hasegawa MShigei YGannon TAgerwala TFreiman C(1985)High-speed top-of-stack scheme for VLSI processorProceedings of the 12th annual international symposium on Computer architecture10.5555/327010.327129(48-54)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.5555/327010.327129
Hasegawa MShigei Y(1985)High-speed top-of-stack scheme for VLSI processorACM SIGARCH Computer Architecture News10.1145/327070.32712913:3(48-54)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.1145/327070.327129
De Prycker M(1982)A Performance Analysis of the Implementation of Addressing Methods in Block-Structured LanguagesIEEE Transactions on Computers10.1109/TC.1982.167596131:2(155-163)Online publication date: 1-Feb-1982
https://dl.acm.org/doi/10.1109/TC.1982.1675961
Hobson R(1981)Software sympathetic chip set designProceedings of the May 4-7, 1981, national computer conference10.1145/1500412.1500414(3-10)Online publication date: 4-May-1981
https://dl.acm.org/doi/10.1145/1500412.1500414
Friedman FStebulis J(1979)An undergraduate compiler laboratoryACM SIGCSE Bulletin10.1145/953030.80954711:1(28-36)Online publication date: 1-Jan-1979
https://dl.acm.org/doi/10.1145/953030.809547
Friedman FStebulis JKerr DDalphin J(1979)An undergraduate compiler laboratoryProceedings of the tenth SIGCSE technical symposium on Computer science education10.1145/800126.809547(28-36)Online publication date: 1-Jan-1979
https://dl.acm.org/doi/10.1145/800126.809547
Myers G(1977)The case against stack-oriented instruction setsACM SIGARCH Computer Architecture News10.1145/859402.8594036:3(7-10)Online publication date: 1-Aug-1977
https://dl.acm.org/doi/10.1145/859402.859403

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Research in a Framework of Embedded Network Protocol Stack and Application

Self-Aligning Return Address Stack

Intercalation theorems for stack languages

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