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Capture-power-aware test data compression using selective encoding

Authors:

Qiang XuAuthors Info & Claims

Integration, the VLSI Journal, Volume 44, Issue 3

Pages 205 - 216

https://doi.org/10.1016/j.vlsi.2011.01.005

Published: 01 June 2011 Publication History

Abstract

Ever-increasing test data volume and excessive test power are two of the main concerns of VLSI testing. The ''don't-care'' bits (also known as X-bits) in given test cube can be exploited for test data compression and/or test power reduction, and these techniques may contradict to each other because the very same X-bits are likely to be used for different optimization objectives. This paper proposes a capture-power-aware test compression scheme that is able to keep capture-power under a safe limit with low test compression ratio loss. Experimental results on benchmark circuits validate the effectiveness of the proposed solution.

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Cited By

Arulmurugan AMurugesan GVivek B(2020)Thermal-aware Test Data Compression for System-on-Chip Based on Modified Bitmask Based MethodsJournal of Electronic Testing: Theory and Applications10.1007/s10836-020-05902-436:5(577-590)Online publication date: 19-Oct-2020
https://dl.acm.org/doi/10.1007/s10836-020-05902-4

Capture-power-aware test data compression using selective encoding
1. Hardware

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Published In

cover image Integration, the VLSI Journal

Integration, the VLSI Journal Volume 44, Issue 3

June, 2011

102 pages

ISSN:0167-9260

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Copyright © Elsevier B.V. © 2011.

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Elsevier Science Publishers B. V.

Netherlands

Publication History

Published: 01 June 2011

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Cited By

Arulmurugan AMurugesan GVivek B(2020)Thermal-aware Test Data Compression for System-on-Chip Based on Modified Bitmask Based MethodsJournal of Electronic Testing: Theory and Applications10.1007/s10836-020-05902-436:5(577-590)Online publication date: 19-Oct-2020
https://dl.acm.org/doi/10.1007/s10836-020-05902-4

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