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research-article

On designing endurance aware erasure code for SSD-based storage systems

Authors:

Saeideh Alinezhad Chamazcoti,

Seyed Ghassem MiremadiAuthors Info & Claims

Microprocessors & Microsystems, Volume 45, Issue PB

Pages 283 - 296

https://doi.org/10.1016/j.micpro.2016.06.003

Published: 01 September 2016 Publication History

Abstract

DPD-factor and GDP-pattern are proposed for comparing the endurance of erasure codes.EA-EO is designed as a modification of EVENODD with smaller DPD-factor.A code with smaller DPD-factor can provide higher endurance for systems.A code with sequential GDP-pattern can provide higher endurance for systems. Erasure codes are applied in both HDD and SSD storage systems to improve the reliability. The design of erasure codes for SSD-based systems should be performed with respect to a specific feature of SSDs, i.e., endurance. Endurance is defined as the number of Program/Erase (P/E)-cycles that one SSD can endure for reliable operation. The common metric for comparing the endurance of two systems is the number of P/E-cycles, which is yielded by time-consuming simulations. This paper proposes two new metrics called DPD-factor and GDP-pattern, for comparing the effect of erasure codes on the endurance of systems based on their encoding designs, without simulation. With respect to the endurance, EA-EO is designed as the modification of EVENODD with smaller DPD-factor. The endurance of EVENODD and EA-EO are compared regarding the system configurations: the size of stripe unit, the number of disks, and the sizes of request. The results of comparison show that the best configurations of system for enhanced endurance are: 1) a large number of disks are applied in systems, or 2) the size of request is equal to the stripe unit size. Furthermore, it concludes that a code with smaller DPD-factor and a sequential GDP-pattern can provide higher endurance for systems.

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Cited By

Liang NZhang XChen HZhang C(2022)Thou code: a triple-erasure-correcting horizontal code with optimal update complexityThe Journal of Supercomputing10.1007/s11227-021-04271-978:7(10088-10117)Online publication date: 1-May-2022
https://dl.acm.org/doi/10.1007/s11227-021-04271-9
McEwan AKomsul M(2018)Age Aware Pre-emptive Garbage Collection for SSD RAIDMicroprocessors & Microsystems10.1016/j.micpro.2017.10.00856:C(13-21)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1016/j.micpro.2017.10.008
Cui XShi LWu K(2017)Towards trustworthy storage using SSDs with proprietary FTLMicroprocessors & Microsystems10.1016/j.micpro.2017.10.00355:C(82-90)Online publication date: 1-Nov-2017
https://dl.acm.org/doi/10.1016/j.micpro.2017.10.003

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cover image Microprocessors & Microsystems

Microprocessors & Microsystems Volume 45, Issue PB

September 2016

137 pages

ISSN:0141-9331

Issue’s Table of Contents

Copyright © Elsevier B.V.

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Elsevier Science Publishers B. V.

Netherlands

Publication History

Published: 01 September 2016

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Cited By

Liang NZhang XChen HZhang C(2022)Thou code: a triple-erasure-correcting horizontal code with optimal update complexityThe Journal of Supercomputing10.1007/s11227-021-04271-978:7(10088-10117)Online publication date: 1-May-2022
https://dl.acm.org/doi/10.1007/s11227-021-04271-9
McEwan AKomsul M(2018)Age Aware Pre-emptive Garbage Collection for SSD RAIDMicroprocessors & Microsystems10.1016/j.micpro.2017.10.00856:C(13-21)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1016/j.micpro.2017.10.008
Cui XShi LWu K(2017)Towards trustworthy storage using SSDs with proprietary FTLMicroprocessors & Microsystems10.1016/j.micpro.2017.10.00355:C(82-90)Online publication date: 1-Nov-2017
https://dl.acm.org/doi/10.1016/j.micpro.2017.10.003

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