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review-article

Technology review of CNTs TSV in 3D IC and 2.5D packaging: : Progress and challenges from an electrical viewpoint

Authors:

H.W. LeeAuthors Info & Claims

Volume 290, Issue C

https://doi.org/10.1016/j.mee.2024.112189

Published: 18 July 2024 Publication History

Abstract

Through‑silicon via (TSV) is one of the most important features in 3D integrated circuit (IC) and 2.5D packaging. Both are within the advanced packaging topic for the digital and analog ICs aligned with More than Moore's paradigm. This article revisits the proposal and progress of carbon nanotubes (CNTs) TSV technology that potentially offers an improvement over the conventional Cu TSV. Today, CNTs TSV has never materialized in commercial products of 3D IC and 2.5D packaging. Compilation on notable numerical modeling works and matching them with related issues in fabrication suggest CNTs TSV technology is still in its infant stage. Although the simulation occasionally shows the advantages of CNTs TSV over Cu TSV in both digital and analog circuits, these results are prone to overestimation. One of the culprits is the number of CNT strands in the bundle which at best can be grown in the fab only ∼ 1 % of the theoretically compact bundle used in the RLC and RLGC models. The direction where CNTs TSV is targeting in 3D IC and 2.5D packaging is not clear by several researchers. As the requirements for high-speed digital and high-frequency analog are different, they are important to be sorted out as an essence of this review to project the path of this CNTs TSV technology.

Highlights

•

The progress of CNTs in TSV for 3D ICs and 2.5D packaging is reviewed.

•

RLGC modeling works and issues in fabrication suggest CNTs TSV technology is still in an infant stage.

•

The high-density CNT forest is only ∼1% of the theoretically compact CNT packing, so the RLGC model is erroneous.

•

For high-frequency analog, development should focus on Cu-CNTs through glass via (TGV) interposer as 2.5D packaging.

•

For high-speed digital, CNTs TSVs are not a good replacement for Cu in 3D ICs and interposers of 2.5D packaging.

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cover image Microelectronic Engineering

Microelectronic Engineering Volume 290, Issue C

Jul 2024

69 pages

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Elsevier B.V.

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Elsevier Science Ltd.

United Kingdom

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Published: 18 July 2024

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