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Formal verification of synchronous data-flow program transformations toward certified compilers

Published: 01 October 2013 Publication History

Abstract

Translation validation was invented in the 90's by Pnueli et al. as a technique to formally verify the correctness of code generators. Rather than certifying the code generator or exhaustively qualifying it, translation validators attempt to verify that program transformations preserve semantics. In this work, we adopt this approach to formally verify that the clock semantics and data dependence are preserved during the compilation of the Signal compiler. Translation validation is implemented for every compilation phase from the initial phase until the latest phase where the executable code is generated, by proving the transformation in each phase of the compiler preserves the semantics. We represent the clock semantics, the data dependence of a program and its transformed counterpart as first-order formulas which are called clock models and synchronous dependence graphs (SDGs), respectively. We then introduce clock refinement and dependence refinement relations which express the preservations of clock semantics and dependence, as a relation on clock models and SDGs, respectively. Our validator does not require any instrumentation or modification of the compiler, nor any rewriting of the source program.

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Cited By

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  • (2019)Towards a simple and safe Objective Caml compiling framework for the synchronous language SIGNALFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-017-6485-y13:4(715-734)Online publication date: 17-Jul-2019
  • (2016)Towards a verified compiler prototype for the synchronous language SIGNALFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-015-4364-y10:1(37-53)Online publication date: 1-Feb-2016
  • (2014)A verified transformationProceedings of the 17th International Workshop on Software and Compilers for Embedded Systems10.1145/2609248.2609259(128-137)Online publication date: 10-Jun-2014
  1. Formal verification of synchronous data-flow program transformations toward certified compilers

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      Published In

      cover image Frontiers of Computer Science: Selected Publications from Chinese Universities
      Frontiers of Computer Science: Selected Publications from Chinese Universities  Volume 7, Issue 5
      October 2013
      205 pages
      ISSN:2095-2228
      EISSN:2095-2236
      Issue’s Table of Contents

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      Springer-Verlag

      Berlin, Heidelberg

      Publication History

      Published: 01 October 2013

      Author Tags

      1. certified compiler
      2. embedded systems
      3. formal verification
      4. multi-clocked synchronous programs
      5. translation validation

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      View all
      • (2019)Towards a simple and safe Objective Caml compiling framework for the synchronous language SIGNALFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-017-6485-y13:4(715-734)Online publication date: 17-Jul-2019
      • (2016)Towards a verified compiler prototype for the synchronous language SIGNALFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-015-4364-y10:1(37-53)Online publication date: 1-Feb-2016
      • (2014)A verified transformationProceedings of the 17th International Workshop on Software and Compilers for Embedded Systems10.1145/2609248.2609259(128-137)Online publication date: 10-Jun-2014

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