A Novel Linear Filter for Incremental Delta-Sigma ADC Based on Modified Least Squares Algorithm
Authors: 
Wang Yuqi, Wang HaiyongAuthors Info & Claims
Pages 3337 - 3354
Abstract
This paper introduces a novel algorithm for optimizing the coefficients of the digital filters used in incremental delta-sigma analog-to-digital converters (IDSC). This algorithm is modified from constrained linear least squares (LS) to improve the signal-to-noise-and-distortion ratio (SNDR) of IDSC and minimize the oversampling rate (OSR) of the modulator, which enhances system speed and reduces power consumption. In the case of the same SNDR, the first-order IDSC with the proposed filter can reduce the OSR of the modulator by 50%, at least compared to the IDSC with the conventional filter. The second-order IDSC with the proposed filter can reach a higher SNDR of 106 dB with an OSR of 64. Considering the nonlinearity of the integrator, the SNDR of IDSC with the proposed filter is also 10 dB greater than that of the conventional filters and 3dB greater than that of the IDSC using the near-optimal algorithm filter. The experimental results indicate that the proposed filter possesses an excellent figure of merit of 0.028 .
References
[1]
Boser BE and Wooley BA The design of sigma-delta modulation analog-to-digital converters IEEE J. Solid-State Circuits 1988 23 6 1298-1308
[2]
Feely O and Chua LO The effect of integrator leak in Sigma - Delta modulation IEEE Trans. Circuits Syst. 1991 38 11 1293-1305
[3]
W. Guicquero, A. Verdant, D. Morche, Incremental Delta Sigma Modulation with Dynamic Weighted Integration, in Proceedings of IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) (2018), pp. 344–347
[4]
G. Guo, D. Wu, Y. Shen, L. Pan, J. Xu, An optimal filter with optional resolution used in incremental ADC for sensor application, in Proceedings of 2011 International Conference on Consumer Electronics, Communications and Networks (CECNet) (2011, )pp. 1042–1045
[5]
Hogenauer E An economical class of digital filters for decimation and interpolation IEEE Trans. Acoust. Speech Signal Process. 1981 29 2 155-162
[6]
L. Huang, C. Lelandais-Perrault, A. Kolar, P. Benabes, A new algorithm for an incremental sigma-delta converter reconstruction filter, in Proceedings of 2019 32nd Symposium on Integrated Circuits and Systems Design (SBCCI) (2019), pp. 1–6
[7]
Kavusi S, Kakavand H, and Gamal AE On incremental sigma-delta modulation with optimal filtering IEEE Trans. Circuits Syst. I Regul. Pap. 2006 53 5 1004-1015
[8]
S. Maréchal, F. Krummenacher, M. Kayal, Optimal filtering of an incremental second-order MASH11 sigma-delta modulator, in Proceedings of 2011 18th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) (2011), pp. 240–243
[9]
J. Markus, High-Order Incremental Delta-Sigma Analog-to-Digital Converters. Ph.D. dissertation, Budapest University of Technology and Economics, Budapest (2015)
[10]
J. Markus, P. Deval, V. Quiquempoix, J. Silva, G.C. Temes, Incremental delta-sigma structures for DC measurement: An overview, in Proceedings of IEEE Custom Integrated Circuits Conference (CICC) (2006), pp. 41–48
[11]
Markus J, Silva J, and Temes GC Theory and Application of Incremental sigma-delta Converters IEEE Trans. Circuits Syst. I Regul. Pap. 2004 51 4 678-690
[12]
Park H, Chae H, and Kim J An optimal digital filtering technique for incremental delta-sigma ADCs using passive integrators Electronics 2021 10 2 213-227
[13]
Pavan S, Schreier R, and Temes GC Understanding Delta-Sigma Data Converters 2017 Hoboken Wiley
[14]
Quiquempoix V, Deval P, Barreto A, Bellini G, Markus J, Silva J, and Temes GC A low-power 22-bit incremental ADC IEEE J. Solid-State Circuits 2006 41 7 1562-1571
[15]
Schreier R, Silva J, Steensgaard J, and Temes GC Design-oriented estimation of thermal noise in switched-capacitor circuits IEEE Trans. Circuits Syst. I Regul. Pap. 2005 52 11 2358-2368
[16]
Silva J, Moon U, Steensgaard J, and Temes GC Wideband low-distortion delta-sigma ADC topology Electron. Lett. 2001 37 12 737-738
[17]
Steensgaard J, Zhang Z, Yu W, Sarhegyi A, Lucchese L, Kim D-I, and Temes GC Noise-power optimization of incremental data converters IEEE Trans. Circuits Syst. I Regul. Pap. 2008 55 5 1289-1296
[18]
Tan Z, Chen C-H, Chae Y, and Temes GC Incremental delta-sigma ADCs: a tutorial review IEEE Trans. Circuits Syst. I Regul. Pap. 2020 67 12 4161-4173
[19]
Tao S and Rusu A A power-efficient continuous-time incremental sigma-delta ADC for neural recording systems IEEE Trans. Circuits Syst. I Regul. Pap. 2015 62 6 1489-1498
[20]
Wang B, Law M-K, Belhaouari SB, and Bermak A Near-optimal decoding of incremental delta-sigma ADC output IEEE Trans. Circuits Syst. I Regul. Pap. 2020 67 11 3670-3680
[21]
W. Yu, M. Aslan, G.C. Temes, 82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction, in Proceedings of IEEE Custom Integrated Circuits Conference (CICC) (2010), pp. 1–4
Recommendations
1---0---1 Cascaded Sigma---Delta Modulator with Internal Feedback
The conventional sigma---delta modulators, such as L-0 MASH and inter-stage feedback topology, have some main drawbacks, e.g. L-0 MASH can only be applied in single loop topology and dynamic range is its big problem, and inter-stage feedback topology ...
A continuous-time delta-sigma ADC for portable ultrasound scanners
A fully differential fourth-order 1-bit continuous-time delta-sigma ADC designed in a 65 nm process for portable ultrasound scanners is presented in this paper. The circuit design, implementation and measurements on the fabricated die are shown. The ...
A continuous-time delta-sigma ADC with integrated digital background calibration
This work presents a digital calibration technique in continuous-time (CT) delta-sigma ($$\Delta \Sigma$$ΔΣ) analog to digital converter. The converter is clocked at 144 MHz with a low oversampling ratio (OSR) of only 8. Dynamic element matching is not ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2024. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.
Publisher
Birkhauser Boston Inc.
United States
Publication History
Published: 28 February 2024
Accepted: 22 January 2024
Revision received: 21 January 2024
Received: 01 September 2023
Author Tags
Qualifiers
- Research-article
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 06 Jan 2025