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A Methodology for Dynamic Power Consumption Estimation Using VHDL Descriptions

Published: 09 September 2002 Publication History

Abstract

Power consumption became an important feature to be considered in system implementations. This work presents a methodology for dynamic power consumption estimation using hardware descriptions written in VHDL; a library with information for transitions and power consumption for all components of the target library is created. A case study for the KASUMI cryptographicalgorithm is reported. This algorithm was chosen to compose The 3rd Generation Partnership Project (3GPP) security functions for mobile systems. Restrictions imposed by the 3GPP to the hardware implementation of KASUMI cryptographic algorithm were analyzed and satisfied; our dynamic power consumption estimation methodology is used. Only CMOS technologies arediscussed in this paper.

Cited By

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  • (2007)Parallel on-chip ciphers development for the third generation mobile telecommunication systemProceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology10.5555/1322468.1322518(299-304)Online publication date: 2-Apr-2007
  • (2007)Higher-level hardware synthesis of the KASUMI algorithmJournal of Computer Science and Technology10.1007/s11390-007-9007-922:1(60-70)Online publication date: 1-Jan-2007
  • (2005)Integrating functional and power simulation in embedded systems designJournal of Embedded Computing10.5555/1233748.12337521:3(325-340)Online publication date: 1-Aug-2005

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cover image ACM Conferences
SBCCI '02: Proceedings of the 15th symposium on Integrated circuits and systems design
September 2002
ISBN:0769518079

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IEEE Computer Society

United States

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Published: 09 September 2002

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Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

View all
  • (2007)Parallel on-chip ciphers development for the third generation mobile telecommunication systemProceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology10.5555/1322468.1322518(299-304)Online publication date: 2-Apr-2007
  • (2007)Higher-level hardware synthesis of the KASUMI algorithmJournal of Computer Science and Technology10.1007/s11390-007-9007-922:1(60-70)Online publication date: 1-Jan-2007
  • (2005)Integrating functional and power simulation in embedded systems designJournal of Embedded Computing10.5555/1233748.12337521:3(325-340)Online publication date: 1-Aug-2005

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