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Article

What is the Appropriate Model for Crosstalk Control?

Published: 18 September 2000 Publication History

Abstract

Crosstalk is inherently an analog phenomenon, and can be modeled on many levels. These models range from simple to complex, with the more complex models giving more accurate predictions, but requiring more data. In the interest of easier tool development, simpler characterization, or reduced file size, however a simpler model may be used. Such a model must be conservative, since it is acceptable to fix a problem that may or may nor exist, but not acceptable to fabricate a chip that does nor work. This paper examines the tradeoffs between different crosstalk models, with experimental data on the effectiveness and computer demands of different types of analysis and fixing. A lumped crosstalk model with timing windows and slopes, and with characterized cell thresholds, reaches the point of diminishing returns in the examples shown. All errors reported by such a model can be repaired without increasing the chip size or hurting the performance, so a more detailed analysis is unnecessary.

Cited By

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  • (2007)Macro-Model for Post-Breakdown 90NM and 130NM Transistors and its Applications in Predicting Chip-Level Function Failure after ESD-CDM EventsProceedings of the 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual10.1109/RELPHY.2007.369872(78-85)Online publication date: 1-Apr-2007
  • (2003)Static noise analysis with noise windowsProceedings of the 40th annual Design Automation Conference10.1145/775832.776049(864-868)Online publication date: 2-Jun-2003

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Information

Published In

cover image ACM Conferences
SBCCI '00: Proceedings of the 13th symposium on Integrated circuits and systems design
September 2000
ISBN:076950843X

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IEEE Computer Society

United States

Publication History

Published: 18 September 2000

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Author Tags

  1. characterized cell thresholds
  2. computer demands
  3. crosstalk
  4. crosstalk control
  5. crosstalk model tradeoffs
  6. digital circuit crosstalk
  7. full analog model
  8. integrated circuit modelling
  9. integrated logic circuits
  10. logic errors
  11. logic simulation
  12. lumped crosstalk model
  13. slopes
  14. timing
  15. timing models
  16. timing windows
  17. tool development

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Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

View all
  • (2007)Macro-Model for Post-Breakdown 90NM and 130NM Transistors and its Applications in Predicting Chip-Level Function Failure after ESD-CDM EventsProceedings of the 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual10.1109/RELPHY.2007.369872(78-85)Online publication date: 1-Apr-2007
  • (2003)Static noise analysis with noise windowsProceedings of the 40th annual Design Automation Conference10.1145/775832.776049(864-868)Online publication date: 2-Jun-2003

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