Versatile mask generation techniques for custom microelectronic devices

A paramount attribute for any computer-aided design methodology, involving custom microelectronic devices, is a rapid and cost effective mask generation technique. The microelectronic device can be characterized as a discrete topological schematic which has been geometrically scaled to imply a grid structure. This topological schematic is constructed from a set of symbols which explicitly define the electrical and logical functions of the device while implying the geometrical relationships related to the process technology. Each layout symbol can be mapped into specific geometrical shapes (layer by layer) which can be defined by sizing data and subsequently subjected to appropriate modification, depending on contextual relationships with the adjacent orthogonal and diagonal layout symbols. These symbol-to-geometrical mappings can be easily comprehended by device designers and the requisite algorithms are amenable to computer implementation. These mask generation techniques provide a cost-effective means of generating mask sets for custom microelectronic devices while also providing device design portability and is ideally suited for process experimentation.