Article

Load Distribution with the Proximity Congestion Awareness in a Network on Chip

Authors:

Erland Nilsson,

Mikael Millberg,

Johnny Oberg,

Axel JantschAuthors Info & Claims

DATE '03: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

Page 11126

Published: 03 March 2003 Publication History

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Abstract

In Networks on Chip, NoC, very low cost and high performance switches will be of critical importance. For a regular two-dimensional NoC we propose a very simple, memoryless switch. In case of congestion, packets are emitted in a non-ideal direction, also called deflective routing. To increase the maximum tolerable load of the network, we propose a Proximity Congestion Awareness, PCA, technique, where switches use load information of neighbouring switches, called stress values, for their own switching decisions, thus avoiding congested areas. We present simulation results with random traffic which show that the PCA technique can increase the maximum traffic load by a factor of over 20.

References

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{2} W. Dally and B. Towles. Route Packets, Not Wires: On-Chip Interconnection Networks. Design Automation Conference, IEEE, Las Vegas, USA, 2001.

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[3]

{3} S. Kumar, A. Jantsch, J-P. Soininen, M. Forsell, M. Millberg, J. Öberg, K. Tiensyrjä, and A. Hemani. A network on chip architecture and design methodology. In Proceedings of IEEE Computer Society Annual Symposium on VLSI, April 2002.

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{4} W. Dally and C. Seitz. The Torus Routing Chip. California Institute of Technology, 1986.

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{5} W. Stallings. Data and Computer Communications. Prentice Hall International Editions, 5th edition, 1997.

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{6} E. Nilsson. Design and Implementation of a hot-potato Switch in a Network on Chip. Master's thesis, Royal Institute of Technology, IMIT/LECS 2002-11, Sweden, June 2002.

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Cited By

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Arora AShukla N(2020)A Congestion Controlled and Load Balanced Selection Strategy for Networks on ChipInternational Journal of Distributed Systems and Technologies10.4018/IJDST.202001010111:1(1-14)Online publication date: 1-Jan-2020
https://dl.acm.org/doi/10.4018/IJDST.2020010101
Reshma Raj RGayathri CKalady SJayaraj PHansdah RKrishnaswamy DVaidya N(2019)Odd-even based adaptive two-way routing in mesh NoCs for hotspot mitigationProceedings of the 20th International Conference on Distributed Computing and Networking10.1145/3288599.3288611(248-252)Online publication date: 4-Jan-2019
https://dl.acm.org/doi/10.1145/3288599.3288611
Li CDong DLiao XLui JWang XWolf ALiu YHu C(2017)Exploiting contention and congestion aware switch allocation in network-on-chipsProceedings of the ACM Turing 50th Celebration Conference - China10.1145/3063955.3063997(1-10)Online publication date: 12-May-2017
https://dl.acm.org/doi/10.1145/3063955.3063997
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Index Terms

Load Distribution with the Proximity Congestion Awareness in a Network on Chip
1. Hardware
  1. Integrated circuits
    1. Digital switches
      1. Logic families
  2. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors
2. Networks
  1. Network properties
    1. Network structure

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Published In

DATE '03: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

March 2003

1112 pages

ISBN:0769518702

Publisher

IEEE Computer Society

United States

Publication History

Published: 03 March 2003

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DATE03

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SIGDA

DATE03: Design, Automation, and Test in Europe 2003

March 3 - 7, 2003

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

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Arora AShukla N(2020)A Congestion Controlled and Load Balanced Selection Strategy for Networks on ChipInternational Journal of Distributed Systems and Technologies10.4018/IJDST.202001010111:1(1-14)Online publication date: 1-Jan-2020
https://dl.acm.org/doi/10.4018/IJDST.2020010101
Reshma Raj RGayathri CKalady SJayaraj PHansdah RKrishnaswamy DVaidya N(2019)Odd-even based adaptive two-way routing in mesh NoCs for hotspot mitigationProceedings of the 20th International Conference on Distributed Computing and Networking10.1145/3288599.3288611(248-252)Online publication date: 4-Jan-2019
https://dl.acm.org/doi/10.1145/3288599.3288611
Li CDong DLiao XLui JWang XWolf ALiu YHu C(2017)Exploiting contention and congestion aware switch allocation in network-on-chipsProceedings of the ACM Turing 50th Celebration Conference - China10.1145/3063955.3063997(1-10)Online publication date: 12-May-2017
https://dl.acm.org/doi/10.1145/3063955.3063997
Kinsy MKhadka SIsakov MBehjat LHan JVelev MChen D(2017)PreNocProceedings of the Great Lakes Symposium on VLSI 201710.1145/3060403.3060406(65-70)Online publication date: 10-May-2017
https://dl.acm.org/doi/10.1145/3060403.3060406
Chen YChang EHsin HChen KWu A(2017)Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2016.258848228:3(838-849)Online publication date: 1-Mar-2017
https://dl.acm.org/doi/10.1109/TPDS.2016.2588482
Du GOu YLi XSong PLu ZGao MFanucci LTeich J(2016)OLITSProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972038(1000-1005)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972038
Jonna GThuniki VMutyam M(2016)CASCADEProceedings of the 29th International Conference on Architecture of Computing Systems -- ARCS 2016 - Volume 963710.1007/978-3-319-30695-7_3(35-47)Online publication date: 4-Apr-2016
https://dl.acm.org/doi/10.1007/978-3-319-30695-7_3
Weldezion AGrange MJantsch ATenhunen HPamunuwa D(2015)Zero-load predictive model for performance analysis in deflection routing NoCsMicroprocessors & Microsystems10.1016/j.micpro.2015.09.00239:8(634-647)Online publication date: 1-Nov-2015
https://dl.acm.org/doi/10.1016/j.micpro.2015.09.002
Jonna GJose JRadhakrishnan RMutyam MFettweis GNebel W(2014)Minimally buffered single-cycle deflection routerProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617053(1-4)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2617053
Jose JMutyam M(2014)Implementation and Analysis of History-Based Output Channel Selection Strategies for Adaptive Routers in Mesh NoCsACM Transactions on Design Automation of Electronic Systems10.1145/264795219:4(1-22)Online publication date: 29-Aug-2014
https://dl.acm.org/doi/10.1145/2647952
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