Article

Safe Intrinsic Evolution of Virtex Devices

Authors:

Gordon Hollingworth,

Steve Smith,

Andy TyrrellAuthors Info & Claims

EH '00: Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware

Page 195

Published: 13 July 2000 Publication History

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Abstract

The new Virtex device is for many people the solution to the long-term problem of implementing random configurations on Digital Electronic devices as is required in the paradigm of Evolvable Hardware. It has previously been shown that Evolvable Hardware was possible on these devices and that it can be accomplished using partial reconfiguration to speed up the configuration process. Unfortunately, the circuit did not have any feedback paths; meaning that any time based circuits could not be implemented. This paper attempts to address this problem by using an array of xc6200 like cells within the Virtex device. Two applications are shown to illustrate the effectiveness of these ideas.

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Fritzsch CHoffmann JBogdan M(2022)Evolving Hardware by Direct Bitstream Manipulation of a Modern FPGA2022 IEEE Congress on Evolutionary Computation (CEC)10.1109/CEC55065.2022.9870297(1-8)Online publication date: 18-Jul-2022
https://dl.acm.org/doi/10.1109/CEC55065.2022.9870297
Cancare FBartolini DCarminati MSciuto DSantambrogio M(2012)On the Evolution of Hardware Circuits via Reconfigurable ArchitecturesACM Transactions on Reconfigurable Technology and Systems10.1145/2392616.23926205:4(1-22)Online publication date: 1-Dec-2012
https://dl.acm.org/doi/10.1145/2392616.2392620
Zhu JLi YHe GXia X(2007)An intrinsic evolvable hardware based on multiplexer module arrayProceedings of the 7th international conference on Evolvable systems: from biology to hardware10.5555/1792161.1792166(35-44)Online publication date: 21-Sep-2007
https://dl.acm.org/doi/10.5555/1792161.1792166
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We consider packing in the commercial FPGA context and examine the speed, performance and power trade-offs associated with packing in a state-of-the art FPGA -- the Xilinx Virtex-5 FPGA. Two aspects of packing are discussed: 1)packing for general logic ...

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EH '00: Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware

July 2000

ISBN:076950762X

Publisher

IEEE Computer Society

United States

Publication History

Published: 13 July 2000

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Fritzsch CHoffmann JBogdan M(2022)Evolving Hardware by Direct Bitstream Manipulation of a Modern FPGA2022 IEEE Congress on Evolutionary Computation (CEC)10.1109/CEC55065.2022.9870297(1-8)Online publication date: 18-Jul-2022
Cancare FBartolini DCarminati MSciuto DSantambrogio M(2012)On the Evolution of Hardware Circuits via Reconfigurable ArchitecturesACM Transactions on Reconfigurable Technology and Systems10.1145/2392616.23926205:4(1-22)Online publication date: 1-Dec-2012
Zhu JLi YHe GXia X(2007)An intrinsic evolvable hardware based on multiplexer module arrayProceedings of the 7th international conference on Evolvable systems: from biology to hardware10.5555/1792161.1792166(35-44)Online publication date: 21-Sep-2007
Tyrrell AGreensted A(2007)Evolving dependabilityACM Journal on Emerging Technologies in Computing Systems10.1145/1265949.12659533:2(7-es)Online publication date: 1-Jul-2007
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007
Tyrrell AAlderighi MSalapura VMcKee S(2006)Dependability in an evolving worldProceedings of the 3rd conference on Computing frontiers10.1145/1128022.1128051(207-220)Online publication date: 3-May-2006
Deepanjali.S Mahammad.Sk N(undefined)Scalable and Accelerated Self Healing Control Circuit using Evolvable HardwareACM Transactions on Design Automation of Electronic Systems10.1145/3634682

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The Intrinsic Evolution of Virtex Devices Through Internet Reconfigurable Logic

Packing Techniques for Virtex-5 FPGAs

Architecture-specific packing for virtex-5 FPGAs

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