Article

Prototyping a GA Pipeline for Complete Hardware Evolution

Authors:

Gunnar Tufte,

Pauline C. HaddowAuthors Info & Claims

EH '99: Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware

Page 18

Published: 19 July 1999 Publication History

Publisher Site

Abstract

In this paper a new approach to evolvable hardware is introduced termed "Complete Hardware Evolution" (CHE). This method differs from Extrinsic and Intrinsic evolution in that the evolution process itself is implemented in hardware. In addition, the evolution process implementation, referred to herein as the GA Pipeline, is implemented on the same chip as the evolving design. A prototype implementation of the GA Pipeline is presented which uses FPGA technology as the implementation medium.

Cited By

View all

Swarnalatha AShanthi A(2014)Complete hardware evolution based SoPC for evolvable hardwareApplied Soft Computing10.5555/2841440.284147818:C(314-322)Online publication date: 1-May-2014
https://dl.acm.org/doi/10.5555/2841440.2841478
Lin YChen J(2009)ReviewExpert Systems with Applications: An International Journal10.1016/j.eswa.2008.01.07736:2(2568-2583)Online publication date: 1-Mar-2009
https://dl.acm.org/doi/10.1016/j.eswa.2008.01.077
Vasicek ZSekanina L(2008)Hardware accelerators for Cartesian genetic programmingProceedings of the 11th European conference on Genetic programming10.5555/1792694.1792715(230-241)Online publication date: 26-Mar-2008
https://dl.acm.org/doi/10.5555/1792694.1792715
Show More Cited By

Recommendations

Complete hardware evolution based SoPC for evolvable hardware

First CHE for EH based on the CGP model, and hence, the complete algorithm, including the required memory is realized on the CLB logic of a single FPGA.No other hard/soft resource (microcontroller or Power PC) usage for the implementation.Memory ...
Optimization of single variable functions using complete hardware evolution

A genetic algorithm (GA) is a computer based search optimization technique that uses the Darwinian ''Theory of Evolution'' as a model for finding exact and approximate solutions. GAs belong to a large family of heuristic algorithms called evolutionary ...
On the Evolution of Hardware Circuits via Reconfigurable Architectures

Traditionally, hardware circuits are realized according to techniques that follow the classical phases of design and testing. A completely new approach in the creation of hardware circuits has been proposed---the Evolvable Hardware (EHW) paradigm, which ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

EH '99: Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware

July 1999

ISBN:0769502563

Publisher

IEEE Computer Society

United States

Publication History

Published: 19 July 1999

Qualifiers

Article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

11
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 19 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Swarnalatha AShanthi A(2014)Complete hardware evolution based SoPC for evolvable hardwareApplied Soft Computing10.5555/2841440.284147818:C(314-322)Online publication date: 1-May-2014
https://dl.acm.org/doi/10.5555/2841440.2841478
Lin YChen J(2009)ReviewExpert Systems with Applications: An International Journal10.1016/j.eswa.2008.01.07736:2(2568-2583)Online publication date: 1-Mar-2009
https://dl.acm.org/doi/10.1016/j.eswa.2008.01.077
Vasicek ZSekanina L(2008)Hardware accelerators for Cartesian genetic programmingProceedings of the 11th European conference on Genetic programming10.5555/1792694.1792715(230-241)Online publication date: 26-Mar-2008
https://dl.acm.org/doi/10.5555/1792694.1792715
Kim JCho T(2007)Routing path generation for reliable transmission in sensor networks using GA with fuzzy logic based fitness functionProceedings of the 2007 international conference on Computational science and its applications - Volume Part III10.5555/1793154.1793214(637-648)Online publication date: 26-Aug-2007
https://dl.acm.org/doi/10.5555/1793154.1793214
Chen YHe J(2007)Using systolic technique to accelerate an EHW engine for lossless image compressionProceedings of the 7th international conference on Evolvable systems: from biology to hardware10.5555/1792161.1792209(433-444)Online publication date: 21-Sep-2007
https://dl.acm.org/doi/10.5555/1792161.1792209
Li QHe J(2007)A sophisticated architecture for evolutionary multiobjective optimization utilizing high performance DSPProceedings of the 7th international conference on Evolvable systems: from biology to hardware10.5555/1792161.1792207(415-425)Online publication date: 21-Sep-2007
https://dl.acm.org/doi/10.5555/1792161.1792207
Kim JCho T(2007)Genetic algorithm based routing method for efficient data transmission in sensor networksProceedings of the intelligent computing 3rd international conference on Advanced intelligent computing theories and applications10.5555/1777454.1777485(273-282)Online publication date: 21-Aug-2007
https://dl.acm.org/doi/10.5555/1777454.1777485
Widiger HSalomon RTimmermann D(2006)Packet classification with evolvable hardware hash functions – an intrinsic approachProceedings of the Second international conference on Biologically Inspired Approaches to Advanced Information Technology10.1007/11613022_8(64-79)Online publication date: 26-Jan-2006
https://dl.acm.org/doi/10.1007/11613022_8
Eklund S(2004)A massively parallel architecture for distributed genetic algorithmsParallel Computing10.1016/j.parco.2003.12.00930:5-6(647-676)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.1016/j.parco.2003.12.009
Martin P(2001)A Hardware Implementation of a Genetic Programming System Using FPGAs and Handel-CGenetic Programming and Evolvable Machines10.1023/A:10129423044642:4(317-343)Online publication date: 1-Dec-2001
https://dl.acm.org/doi/10.1023/A%3A1012942304464
Show More Cited By

Abstract

Cited By

Recommendations

Complete hardware evolution based SoPC for evolvable hardware

Optimization of single variable functions using complete hardware evolution

On the Evolution of Hardware Circuits via Reconfigurable Architectures

Comments

Information

Published In

Publisher

Publication History

Qualifiers

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

View options

Figures

Other

Share

Share this Publication link

Share on social media

Affiliations