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A Gauss-elimination based PRPG for combinational circuits

Published: 06 March 1995 Publication History

Abstract

A new algorithm for the reseeding of multiple polynomial LFSR for pseudorandom test pattern generation (PRPG) is proposed in this paper. It is based on the Gauss-elimination procedure and the deterministic test set generated by an ATPG software system for combinational circuits. In addition to the general LFSR model, we also provide two further improvements, ms1p and 1smp, to minimize the hardware overhead. Experimental results were obtained on ISCAS-85 benchmark circuits to demonstrate the effectiveness of this methodology. Complete fault coverage is achieved in all circuits. Low hardware overhead is also maintained with a reasonable test length.

References

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[2] J. Hartmann et al., "How to do Weighted Random Testing for BIST?" In Proc. of the Int. Conf. on Computer-Aided-Design, pp. 568-571, 1993.
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[3] I. Pomeranz et al., "3_Weight Pseudo-Random Test Generation Based on a Deterministic Test Set for Combinational and Sequential Circuits," IEEE Trans. Computer-Aided-Design of Integrated Circuits and Systems, Vol. 12, No. 7, pp. 1050-1058, July 1993.
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[4] J. Savir et al., "A Multiple Seed Linear Feedback Shift Register," IEEE Trans. Computers, pp. 250-252, 1992.
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[5] S. Hellebrand et al., "Generation of Vector Patterns through Reseeding of Multiple Polynomial LFSRs," IEEE Int. Test Conf., pp. 120-129, 1992.
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[6] S. Venkataraman et al., "An Efficient BIST Scheme Based on Reseeding of Multiple Polynomial Linear Feedback Shift Registers," In Proc. of the Int. Conf. on Computer-Aided-Design, pp. 572-577, 1993.
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[7] S. J. Upadhyaya et al., "On-chip Test Generation for Combinational Circuits by LFSR Modification," In Proc. of the Int. Conf. on Computer-Aided-Design, pp. 84-87, 1993.
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[8] Michael D. Greenberg, "Advanced Engineering Mathematics," Prentice-Hall Inc., 1988.
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[9] P. Goel, "An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits," IEEE Trans. on Computers, pp. 215-222, Mar. 1981.
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  1. A Gauss-elimination based PRPG for combinational circuits

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      Published In

      cover image ACM Conferences
      EDTC '95: Proceedings of the 1995 European conference on Design and Test
      March 1995
      556 pages
      ISBN:0818670398

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      IEEE Computer Society

      United States

      Publication History

      Published: 06 March 1995

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      Author Tags

      1. 1smp
      2. ATPG software system
      3. Gauss-elimination based PRPG
      4. algorithm
      5. automatic test software
      6. combinational circuits
      7. deterministic test set
      8. fault coverage
      9. general LFSR model
      10. integrated circuit testing
      11. integrated logic circuits
      12. logic testing
      13. low hardware overhead
      14. ms1p
      15. multiple polynomial LFSR
      16. pseudorandom test pattern generation
      17. reseeding

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