[go: up one dir, main page]
More Web Proxy on the site http://driver.im/ skip to main content
10.5555/784894.785070guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
Article

Bit Permutation Instructions for Accelerating Software Cryptography

Published: 10 July 2000 Publication History

Abstract

Permutation is widely used in cryptographic algorithms. However, it is not well supported in existing instruction sets. In this paper, two instructions, PPERM3R and GRP, are proposed for efficient software implementation of arbitrary permutations. The PPERM3R instruction can be used for dynamically specified permutations; the GRP instruction can be used to do arbitrary n-bit permutations with up to lg(n) instructions. In addition, a systematic method for determining the instruction sequence for performing an arbitrary permutation is described.

Cited By

View all
  • (2017)Light-weight hash algorithms using GRP instructionProceedings of the 10th International Conference on Security of Information and Networks10.1145/3136825.3136891(206-211)Online publication date: 13-Oct-2017
  • (2015)A novel image steganography scheme based on morphological associative memory and permutation schemaSecurity and Communication Networks10.1002/sec.9628:2(110-121)Online publication date: 25-Jan-2015
  • (2014)CryptoraptorProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691398(154-161)Online publication date: 3-Nov-2014
  • Show More Cited By
  1. Bit Permutation Instructions for Accelerating Software Cryptography

      Recommendations

      Comments

      Please enable JavaScript to view thecomments powered by Disqus.

      Information & Contributors

      Information

      Published In

      cover image Guide Proceedings
      ASAP '00: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
      July 2000
      ISBN:0769507166

      Publisher

      IEEE Computer Society

      United States

      Publication History

      Published: 10 July 2000

      Author Tags

      1. Instruction Set Architecture
      2. bit-level instructions
      3. cryptography
      4. permutations
      5. processor architecture
      6. security

      Qualifiers

      • Article

      Contributors

      Other Metrics

      Bibliometrics & Citations

      Bibliometrics

      Article Metrics

      • Downloads (Last 12 months)0
      • Downloads (Last 6 weeks)0
      Reflects downloads up to 14 Dec 2024

      Other Metrics

      Citations

      Cited By

      View all
      • (2017)Light-weight hash algorithms using GRP instructionProceedings of the 10th International Conference on Security of Information and Networks10.1145/3136825.3136891(206-211)Online publication date: 13-Oct-2017
      • (2015)A novel image steganography scheme based on morphological associative memory and permutation schemaSecurity and Communication Networks10.1002/sec.9628:2(110-121)Online publication date: 25-Jan-2015
      • (2014)CryptoraptorProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691398(154-161)Online publication date: 3-Nov-2014
      • (2014)RMDDSACM Journal on Emerging Technologies in Computing Systems10.1145/256492310:2(1-25)Online publication date: 6-Mar-2014
      • (2013)Synthesis and optimization of reversible circuits—a surveyACM Computing Surveys10.1145/2431211.243122045:2(1-34)Online publication date: 12-Mar-2013
      • (2008)Boosting AES performance on a tiny processor coreProceedings of the 2008 The Cryptopgraphers' Track at the RSA conference on Topics in cryptology10.5555/1791688.1791704(170-186)Online publication date: 8-Apr-2008
      • (2008)Light-Weight Instruction Set Extensions for Bit-Sliced CryptographyProceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems10.1007/978-3-540-85053-3_21(331-345)Online publication date: 10-Aug-2008
      • (2007)Sorter based permutation units for media-enhanced microprocessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89875015:6(711-715)Online publication date: 1-Jun-2007
      • (2007)Exploring software partitions for fast security processing on a multiprocessor mobile SoCIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89874015:6(699-710)Online publication date: 1-Jun-2007
      • (2007)Configuration and extension of embedded processors to optimize IPSec protocol executionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89691215:5(605-609)Online publication date: 1-May-2007
      • Show More Cited By

      View Options

      View options

      Media

      Figures

      Other

      Tables

      Share

      Share

      Share this Publication link

      Share on social media