Cited By
View all- Lam TYang STang WWu YBahar RLombardi FAtienza DBrunvand E(2010)Logic synthesis for low power using clock gating and rewiringProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785527(179-184)Online publication date: 16-May-2010
- Cobb JGulati KKhatri SLombardi FBhanja SMassoud YBahar R(2009)Robust window-based multi-node technology-independent logic minimizationProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531623(357-362)Online publication date: 10-May-2009
- Zhu QKitchen NKuehlmann ASangiovanni-Vincentelli ASentovich E(2006)SAT sweeping with local observability don't-caresProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1146970(229-234)Online publication date: 24-Jul-2006
- Show More Cited By