The Application of a Geometric Arithmetic Parallel Systolic Array Processor to Database Machine Design

Using a directed acyclic graph (DAG) model of algorithms, the authors focus on processor-time-minimal multiprocessor schedules: time-minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo, and Lewis (KLL) algorithm for ...

Systolic arrays are becoming the backbone of machine learning accelerators due to high computational parallelism and data re-usability. This paper presents a novel fully factored systolic array architecture: it extracts out the booth encoding logic ...