Article

Compiling and Optimizing Image Processing Algorithms for FPGAs

Authors:

W. Bohm,

C. Ross,

J. BinsAuthors Info & Claims

CAMP '00: Proceedings of the Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)

Page 222

Published: 11 September 2000 Publication History

Publisher Site

Abstract

This paper presents a high-level language for expressing image processing algorithms, and an optimizing compiler that targets FPGAs. The language is called SA-C, and this paper focuses on the language features that 1) support image processing, and 2) enable efficient compilation to FPGAs. It then describes the compilation process, in which SA-C algorithms are translated into non-recursive data flow graphs, which in turn are translated into VHDL. Finally, it presents performance numbers for some well-known image processing routines, written in SAC and automatically compiled to an Annapolis Microsystems WildForce board with Xilinx 4036XL FPGAs.

Cited By

View all

Pu JBell SYang XSetter JRichardson SRagan-Kelley JHorowitz M(2017)Programming Heterogeneous Systems from an Image Processing DSLACM Transactions on Architecture and Code Optimization10.1145/310795314:3(1-25)Online publication date: 16-Aug-2017
https://dl.acm.org/doi/10.1145/3107953
Liu FGhosh SJohnson NAugust D(2014)CGPAProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593105(1-6)Online publication date: 1-Jun-2014
https://dl.acm.org/doi/10.1145/2593069.2593105
Keinert JHaubelt CTeich J(2008)Synthesis of multi-dimensional high-speed FIFOs for out-of-order communicationProceedings of the 21st international conference on Architecture of computing systems10.5555/1787770.1787786(130-143)Online publication date: 25-Feb-2008
https://dl.acm.org/doi/10.5555/1787770.1787786
Show More Cited By

Compiling and Optimizing Image Processing Algorithms for FPGAs
1. Software and its engineering
  1. Software notations and tools
2. Theory of computation
  1. Semantics and reasoning

Recommendations

Hardware-based text-to-braille translator
Assets '06: Proceedings of the 8th international ACM SIGACCESS conference on Computers and accessibility

This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented is able to carry out text-to-Braille ...
Packing Techniques for Virtex-5 FPGAs

Packing is a key step in the FPGA tool flow that straddles the boundaries between synthesis, technology mapping and placement. Packing strongly influences circuit speed, density, and power, and in this article, we consider packing in the commercial FPGA ...
Accelerated image processing on FPGAs

The Cameron project has developed a language called single assignment C (SA-C), and a compiler for mapping image-based applications written in SA-C to field programmable gate arrays (FPGAs). The paper tests this technology by implementing several ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

CAMP '00: Proceedings of the Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)

September 2000

ISBN:0769507409

Publisher

IEEE Computer Society

United States

Publication History

Published: 11 September 2000

Author Tags

Qualifiers

Article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

7
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 13 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Pu JBell SYang XSetter JRichardson SRagan-Kelley JHorowitz M(2017)Programming Heterogeneous Systems from an Image Processing DSLACM Transactions on Architecture and Code Optimization10.1145/310795314:3(1-25)Online publication date: 16-Aug-2017
https://dl.acm.org/doi/10.1145/3107953
Liu FGhosh SJohnson NAugust D(2014)CGPAProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593105(1-6)Online publication date: 1-Jun-2014
https://dl.acm.org/doi/10.1145/2593069.2593105
Keinert JHaubelt CTeich J(2008)Synthesis of multi-dimensional high-speed FIFOs for out-of-order communicationProceedings of the 21st international conference on Architecture of computing systems10.5555/1787770.1787786(130-143)Online publication date: 25-Feb-2008
https://dl.acm.org/doi/10.5555/1787770.1787786
Asplund LBergkvist HNordh T(2006)ChipVision2 – a stereo vision system for robots based on reconfigurable hardwareRoboCup 200510.5555/2124160.2124200(359-370)Online publication date: 1-Jan-2006
https://dl.acm.org/doi/10.5555/2124160.2124200
VanCourt TGu YMundada VHerbordt M(2006)Rigid molecule dockingEURASIP Journal on Advances in Signal Processing10.1155/ASP/2006/979502006(64-64)Online publication date: 1-Jan-2006
https://dl.acm.org/doi/10.1155/ASP/2006/97950
Torres-Huitzil CArias-Estrada M(2005)FPGA-based configurable systolic architecture for window-based image processingEURASIP Journal on Advances in Signal Processing10.1155/ASP.2005.10242005(1024-1034)Online publication date: 1-Jan-2005
https://dl.acm.org/doi/10.1155/ASP.2005.1024
Estlick MLeeser MTheiler JSzymanski JHauck S(2001)Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardwareProceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays10.1145/360276.360311(103-110)Online publication date: 1-Feb-2001
https://dl.acm.org/doi/10.1145/360276.360311

Abstract

Cited By

Recommendations

Hardware-based text-to-braille translator

Packing Techniques for Virtex-5 FPGAs

Accelerated image processing on FPGAs

Comments

Information

Published In

Publisher

Publication History

Author Tags

Qualifiers

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

View options

Figures

Other

Share

Share this Publication link

Share on social media

Affiliations