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Reusability is FIRRTL ground: hardware construction languages, compiler frameworks, and transformations

Published: 13 November 2017 Publication History

Abstract

Enabled by modern languages and retargetable compilers, software development is in a virtual "Cambrian explosion" driven by a critical mass of powerfully parameterized libraries; but hardware development practices lag far behind. We hypothesize that existing hardware construction languages (HCLs) and novel hardware compiler frameworks (HCFs) can put hardware development on a similar evolutionary path by enabling new hardware libraries to be independent of underlying process technologies including FPGA mappings. We support this claim by (1) evaluating the degree with which Chisel, an existing HCL, can support powerfully parameterized libraries, and (2) introducing the concept and implementation of an HCF that uses an open-source hardware intermediate representation, FIRRTL (Flexible Intermediate Representation for RTL), to transform target-independent RTL into technology-specific RTL. Finally, we evaluate many hardware compiler transformations, including simplifying transformations, analyses, optimizations, instrumentations, and specializations, which demonstrate the power of a combined HCL and HCF approach.

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Cited By

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  • (2019)Toward a graph-based dependence analysis framework for high level design verificationProceedings of the 16th ACM International Conference on Computing Frontiers10.1145/3310273.3323433(308-316)Online publication date: 30-Apr-2019
  • (2019)Beyond Schematic CaptureProceedings of the 2019 CHI Conference on Human Factors in Computing Systems10.1145/3290605.3300513(1-13)Online publication date: 2-May-2019
  • (2019)FASEDProceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/3289602.3293894(330-339)Online publication date: 20-Feb-2019
  • Show More Cited By

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Published In

cover image ACM Conferences
ICCAD '17: Proceedings of the 36th International Conference on Computer-Aided Design
November 2017
1077 pages

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  • IEEE-EDS: Electronic Devices Society

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IEEE Press

Publication History

Published: 13 November 2017

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Author Tags

  1. ASIC
  2. FIRRTL
  3. FPGA
  4. RTL
  5. chisel
  6. compiler
  7. hardware
  8. hardware construction language
  9. hardware design language
  10. intermediate representation
  11. modeling
  12. reusability
  13. transformations

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ICCAD '17
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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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View all
  • (2019)Toward a graph-based dependence analysis framework for high level design verificationProceedings of the 16th ACM International Conference on Computing Frontiers10.1145/3310273.3323433(308-316)Online publication date: 30-Apr-2019
  • (2019)Beyond Schematic CaptureProceedings of the 2019 CHI Conference on Human Factors in Computing Systems10.1145/3290605.3300513(1-13)Online publication date: 2-May-2019
  • (2019)FASEDProceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/3289602.3293894(330-339)Online publication date: 20-Feb-2019
  • (2018)ACEDProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3195981(1-6)Online publication date: 24-Jun-2018

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