research-article

Automated hardware generation of CNN models on FPGAs: late breaking results

Authors:

Danielle Tchuinkou Kwadjo,

Christophe BobdaAuthors Info & Claims

DAC '20: Proceedings of the 57th ACM/EDAC/IEEE Design Automation Conference

Article No.: 260, Pages 1 - 2

Published: 18 November 2020 Publication History

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Abstract

In this paper, we propose an automated framework that takes as input a TensorFlow inference graph and generates high-performance accelerators on FPGA by assembling CNN pre-implemented components as a puzzle, based on the graph topology. Using pre-implemented components allows us the only use the minimum of resources necessary, predict the performance and a gain in productivity We adopt a unified representation based on systolic array to perform the computational-hungry operations of the model and provide novel analysis of design trade-offs for FPGA CNN accelerators. Experimental results show the great performance, low latency and flexibility provided by the proposed framework.

References

[1]

D. Tchuinkou and C. Bobda, "R-covnet: Recurrent neural convolution network for 3d object recognition," in 2018 25th IEEE International Conference on Image Processing (ICIP). IEEE, 2018, pp. 331--335.

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[2]

C. Lavin and A. Kaviani, "Rapidwright: Enabling custom crafted implementations for fpgas," in 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 2018, pp. 133--140.

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C. Zhang, G. Sun, Z. Fang, P. Zhou, P. Pan, and J. Cong, "Caffeine: Towards uniformed representation and acceleration for deep convolutional neural networks," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.

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J. Zhang and J. Li, "Improving the performance of opencl-based fpga accelerator for convolutional neural network," in Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. ACM, 2017, pp. 25--34.

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Cited By

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Xu SJiang JXu JQian X(2024)Efficient SpMM Accelerator for Deep Learning: Sparkle and Its Automated GeneratorACM Transactions on Reconfigurable Technology and Systems10.1145/366589617:3(1-30)Online publication date: 7-Jun-2024
https://dl.acm.org/doi/10.1145/3665896
Mbongue JKwadjo DShuping ABobda C(2022)Deploying Multi-tenant FPGAs within Linux-based Cloud InfrastructureACM Transactions on Reconfigurable Technology and Systems10.1145/347405815:2(1-31)Online publication date: 30-Jun-2022
https://dl.acm.org/doi/10.1145/3474058

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Information & Contributors

Information

Published In

DAC '20: Proceedings of the 57th ACM/EDAC/IEEE Design Automation Conference

July 2020

1545 pages

ISBN:9781450367257

General Chair:
Zhuo Li
Cadence Design Systems, Inc., Austin, TX

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IEEE-CEDA

Publisher

IEEE Press

Publication History

Published: 18 November 2020

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DAC '20

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DAC '20: The 57th Annual Design Automation Conference 2020

July 20 - 24, 2020

Virtual Event, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

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Xu SJiang JXu JQian X(2024)Efficient SpMM Accelerator for Deep Learning: Sparkle and Its Automated GeneratorACM Transactions on Reconfigurable Technology and Systems10.1145/366589617:3(1-30)Online publication date: 7-Jun-2024
https://dl.acm.org/doi/10.1145/3665896
Mbongue JKwadjo DShuping ABobda C(2022)Deploying Multi-tenant FPGAs within Linux-based Cloud InfrastructureACM Transactions on Reconfigurable Technology and Systems10.1145/347405815:2(1-31)Online publication date: 30-Jun-2022
https://dl.acm.org/doi/10.1145/3474058

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Implementation of a CNN accelerator on an Embedded SoC Platform using SDSoC

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