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Unified DRAM and NVM hybrid buffer cache architecture for reducing journaling overhead

Published: 14 March 2016 Publication History

Abstract

Journaling techniques play an important role in addressing the reliability issue of filesystems caused by the volatile DRAM-based buffer cache. However, journaling techniques introduce a large number of extra storage writes, which greatly degrades the performance of the filesystem [10]. Emerging NonVolatile Memory (NVM) technologies bring a new perspective of solving the write amplification issue caused by journaling. By adopting NVM as the buffer cache, the committed data can be maintained in NVM before being written back to the storage, thus eliminating the journaling overhead. However, simply replacing DRAM with NVM as the buffer cache suffers from the limited lifetime and relative slow writes of NVM.
In this paper, we present a hybrid buffer cache architecture by combing NVM with DRAM to reduce the journaling overhead and overcome the constraints of NVM. In order to better utilize this novel architecture, we first propose a Journaling-Aware Page Management (JAPM) policy. JAPM puts infrequently updated data in NVM to reduce the journaling overhead and frequently updated data in DRAM to improve the write performance and lifetime of the hybrid buffer cache. In addition, data in one transaction may be dispersed in NVM and DRAM simultaneously and different committing policies are required for different storing media, NVM or DRAM. In order to guarantee the atomicity of the transactional execution in the hybrid cache architecture, a Partial In-Place Commit (PIPC) journaling scheme is proposed to coordinate the different committing patterns. We implement the proposed techniques on Linux 3.14.52 and measure the performance with representative I/O-intensive benchmarks. The experimental results show that our scheme effectively improves the I/O performance compared with the ext4 filesystem and prolongs the lifetime of the hybrid buffer cache compared with the Union of Buffer cache and Journaling (UBJ) scheme [10].

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Cited By

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  • (2018)Enhancing the Energy Efficiency of Journaling File System via Exploiting Multi-Write Modes on MLC NVRAMProceedings of the International Symposium on Low Power Electronics and Design10.1145/3218603.3218632(1-6)Online publication date: 23-Jul-2018
  • (2017)Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAMProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062236(1-6)Online publication date: 18-Jun-2017

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Information

Published In

cover image Guide Proceedings
DATE '16: Proceedings of the 2016 Conference on Design, Automation & Test in Europe
March 2016
1779 pages
ISBN:9783981537062
  • General Chair:
  • Luca Fanucci,
  • Program Chair:
  • Jürgen Teich

Sponsors

  • IMEC: IMEC
  • Systematic: Systematic Paris-Region Systems & ICT Cluster
  • DREWAG: DREWAG
  • AENEAS: AENEAS
  • Technical University of Dresden
  • CMP: Circuits Multi Projets
  • PENTA: PENTA
  • CISCO
  • OFFIS: Oldenburger Institut für Informatik
  • Goethe University: Goethe University Frankfurt

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EDA Consortium

San Jose, CA, United States

Publication History

Published: 14 March 2016

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View all
  • (2018)Enhancing the Energy Efficiency of Journaling File System via Exploiting Multi-Write Modes on MLC NVRAMProceedings of the International Symposium on Low Power Electronics and Design10.1145/3218603.3218632(1-6)Online publication date: 23-Jul-2018
  • (2017)Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAMProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062236(1-6)Online publication date: 18-Jun-2017

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