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Jitter amplifier for oscillator-based true random number generator

Published: 25 January 2011 Publication History

Abstract

This paper presents a jitter amplifier for oscillator-based TRNG (true random number generator). The proposed jitter amplifier fabricated in a 65nm CMOS process occupying the area of 3,300 μm2 archives 8.4x gain at 25 °C and significantly improves the entropy enough to pass randomness test.

References

[1]
B. Jun and P. Kocher, "The Intel random number generator," cryptography research inc., white paper prepared for Intel corp., Apr., 1999.
[2]
M. Bucci, L. Germani, R. Luzzi, A. Trifiletti and M. Varanonuovo, "A high-speed oscillator-based truly random number source for cryptographic applications on a smart card IC," IEEE Trans. on Computers, vol. 52, no. 4, pp. 403--409, Apr., 2003.
[3]
G. K. Balachandran and R. E. Barnett, "A 440-nA true random number generator for passive RFID tags," IEEE Trans. on Circuits and Systems, vol. 55, no. 11, Dec., 2008.
[4]
T. Amaki, M. Hashimoto, Y. Mitsuyama and T. Onoye, "A design procedure for oscillator-based hardware random number generator with stochastic behavior modeling," Proc. WISA, Aug., 2010.
[5]
"Security requirements for cryptographic modules," FIPS pub. 140--2, May, 2001.
[6]
"A statistical test suite for the validation of random number generators and pseudorandom number generators for cryptographic applications," NIST, pub. 800--22, May, 2001.

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cover image ACM Conferences
ASPDAC '11: Proceedings of the 16th Asia and South Pacific Design Automation Conference
January 2011
841 pages
ISBN:9781424475162

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IEEE Press

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Published: 25 January 2011

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