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On bifunctional polymorphic gates controlled by a special signal

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WSEAS Transactions on Circuits and Systems, Volume 7, Issue 3

Pages 96 - 101

Published: 01 March 2008 Publication History

Abstract

Polymorphic digital circuits are circuits composed of polymorphic (multifunctional) as well as ordinary gates. In addition to its standard logic function (such as NAND), a polymorphic gate exhibits another logic function which is activated under a specific condition, for example, when Vdd, temperature, illumination or a special signal reaches a certain level. This paper describes existing polymorphic gates and their features, benefits and limits and discusses special class of polymorphic gates - bifunctional polymorphic gates controlled by a special signal. These gates seem to be most flexible polymorphic gates. In the paper a new two-input bifunctional gate for polymorphic circuits is proposed. The gate produces NAND or XOR function according to a special signal. The proposed gate is effective in terms of area overhead - it consists of 9 transistors only, while corresponding circuit employing conventional gates consists of more than 10 transistors.

References

[1]

Stoica, A., Zebulum, R. S., Keymeulen, D., Polymorphic electronics. Proc. of Evolvable Systems: From Biology to Hardware Conference, volume 2210 of LNCS, Springer 2001, pp. 291-302.

Digital Library

Google Scholar

[2]

Stoica, A., Zebulum, R. S., Guo, X., Keymeulen, D., Ferguson, I., Duong, V., Taking evolutionary circuit design from experimentation to implementation: Some useful techniques and a silicon demonstration. IEE Proc.-Comp. Digit. Tech., 151(4), 2004, pp. 295-300.

Crossref

Google Scholar

[3]

Stoica, A., Zebulum, R., Keymeulen, D., Lohn, J., On polymorphic circuits and their design using evolutionary algorithms. Proc. of IASTED International Conference on Applied Informatics (AI2002). Insbruck, Austria, 2002.

Google Scholar

[4]

Stoica, A., Zebulum, R., Four-function logic gate controlled by analog voltage. NASA New Technology Report NPO-40772, NASA's Jet Propulsion Laboratory, Pasadena, California. http://www.afrlhorizons.com/ETB/ETBriefs/Mar06/ NPO_40772.html

Google Scholar

[5]

Sekanina, L., Martinek, T., Gajda, Z., Extrinsic and intrinsic evolution of multifunctional combinational modules. 2006 IEEE World Congress on Computational Intelligence, IEEE CIS, 2006, pp. 9676-9683.

Crossref

Google Scholar

[6]

Sekanina, L, Starecek, L., Kotasek, Z., Novel logic circuits controlled by Vdd. 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, Prague, CZ, IEEE CS, 2006, pp. 85-86.

Digital Library

Google Scholar

[7]

Sekanina, L., Starecek, L., Gajda, Z., Kotasek, Z., Evolution of multifunctional combinational modules controlled by the power supply voltage. 1st NASA/ESA Conference on Adaptive Hardware and Systems, Piscataway, US, IEEE CS, 2006, pp. 186-193.

Digital Library

Google Scholar

[8]

Ruzicka, R., Sekanina, L., Evolutionary circuit design in REPOMO - Reconfigurable Polymorphic Module. The Second IASTED International Conference on Computational Intelligence, Anaheim, US, ACTA Press, 2006, pp. 237-241.

Google Scholar

[9]

Neil H.E., Weste and Kamran Eshraghian, Principles of CMOS VLSI design. Addison-Wesley, 1992.

Google Scholar

[10]

L. Sekanina. Design Methods for Polymorphic Digital Circuits. In Proc. of the 8th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop DDECS 2005, pp. 145-150, Sopron, Hungary, 2005. University of West Hungary.

Google Scholar

[11]

Sekanina Lukáš: Design and Analysis of a New Self-Testing Adder Which Utilizes Polymorphic Gates, In: 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Gliwice, PL, IEEE CS, 2007, pp. 243-246.

Crossref

Google Scholar

[12]

Sekanina Lukáš: Evolution of Polymorphic Self-Checking Circuits, In: Lecture Notes in Computer Science, 2007, No. 4684, DE, pp. 186-197.

Crossref

Google Scholar

Cited By

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Wang TCui XYu DAramoon ODunlap TQu GCui XShin Y(2018)Polymorphic gate based IC watermarking techniquesProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201627(90-96)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201627
Wang TCui XYu DAramoon ODunlap TQu GCui XChen DHomayoun HTaskin B(2018)A Novel Polymorphic Gate Based Circuit Fingerprinting TechniqueProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194572(141-146)Online publication date: 30-May-2018
https://dl.acm.org/doi/10.1145/3194554.3194572
Wang TCui XYu DAramoon ODunlap TQu GCui X(2018)Polymorphic gate based IC watermarking techniques2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2018.8297288(90-96)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.1109/ASPDAC.2018.8297288

Index Terms

On bifunctional polymorphic gates controlled by a special signal
1. Hardware

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cover image WSEAS Transactions on Circuits and Systems

WSEAS Transactions on Circuits and Systems Volume 7, Issue 3

March 2008

64 pages

ISSN:1109-2734

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World Scientific and Engineering Academy and Society (WSEAS)

Stevens Point, Wisconsin, United States

Publication History

Revised: 31 March 2008

Published: 01 March 2008

Received: 31 December 2007

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Wang TCui XYu DAramoon ODunlap TQu GCui XShin Y(2018)Polymorphic gate based IC watermarking techniquesProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201627(90-96)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201627
Wang TCui XYu DAramoon ODunlap TQu GCui XChen DHomayoun HTaskin B(2018)A Novel Polymorphic Gate Based Circuit Fingerprinting TechniqueProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194572(141-146)Online publication date: 30-May-2018
https://dl.acm.org/doi/10.1145/3194554.3194572
Wang TCui XYu DAramoon ODunlap TQu GCui X(2018)Polymorphic gate based IC watermarking techniques2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2018.8297288(90-96)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.1109/ASPDAC.2018.8297288

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Recommendations

New polymorphic NAND/XOR gate

Physical Demonstration of Polymorphic Self-Checking Circuits

Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates

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