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Computer Science > Distributed, Parallel, and Cluster Computing

arXiv:2402.12111 (cs)
[Submitted on 19 Feb 2024]

Title:Evaluating Versal AI Engines for option price discovery in market risk analysis

Authors:Mark Klaisoongnoen, Nick Brown, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus
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Abstract:Whilst Field-Programmable Gate Arrays (FPGAs) have been popular in accelerating high-frequency financial workload for many years, their application in quantitative finance, the utilisation of mathematical models to analyse financial markets and securities, is less mature. Nevertheless, recent work has demonstrated the benefits that FPGAs can deliver to quantitative workloads, and in this paper, we study whether the Versal ACAP and its AI Engines (AIEs) can also deliver improved performance. We focus specifically on the industry standard Strategic Technology Analysis Center's (STAC) derivatives risk analysis benchmark STAC-A2. Porting a purely FPGA-based accelerator STAC-A2 inspired market risk (SIMR) benchmark to the Versal ACAP device by combining Programmable Logic (PL) and AIEs, we explore the development approach and techniques, before comparing performance across PL and AIEs. Ultimately, we found that our AIE approach is slower than a highly optimised existing PL-only version due to limits on both the AIE and PL that we explore and describe.
Comments: Author accepted version of paper accepted to the 32nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC)
Cite as: arXiv:2402.12111 [cs.DC]
  (or arXiv:2402.12111v1 [cs.DC] for this version)
  https://doi.org/10.48550/arXiv.2402.12111
Related DOI: https://doi.org/10.1145/3626202.3637578

Submission history

From: Nick Brown [view email]
[v1] Mon, 19 Feb 2024 13:04:05 UTC (1,240 KB)
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