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Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors

Published: 26 April 2004 Publication History

Abstract

Main goal of the paper is introducing a dynamic branch prediction scheme suitable for energy-aware VLIW (Very Long Instruction Word) processors. The proposed technique is based on a compiler hint mechanism to filter the accesses to the branch predictor blocks. Experimental results have been carried out on Lx/ST200, an industrial 4-issue VLIW architecture. We gathered two sets of results: First, by introducing the proposed low-power branch prediction technique in the Lx processor, which features fully static branch prediction, a significant improvement of the energy-delay metric has been observed. Second, we evaluated filtering efficacy of the proposed method and we found that it gets an access reduction to the branch prediction unit of 93% with respect to a processor directly derived from Lx, featuring cycle-by-cycle prediction, corresponding to an average 9% energy reduction of the whole processor power budget.

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Cited By

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  • (2020)Energy Efficient On-Demand Dynamic Branch Prediction ModelsIEEE Transactions on Computers10.1109/TC.2019.295671069:3(453-465)Online publication date: 1-Mar-2020
  • (2015)On-Demand Dynamic Branch PredictionIEEE Computer Architecture Letters10.1109/LCA.2014.233082014:1(50-53)Online publication date: 1-Jan-2015
  • (2015)Mobile ecosystem driven application-specific low-power control microarchitectureProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357186(720-727)Online publication date: 18-Oct-2015
  • Show More Cited By

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    cover image ACM Conferences
    GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI
    April 2004
    479 pages
    ISBN:1581138539
    DOI:10.1145/988952
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

    Publication History

    Published: 26 April 2004

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    Author Tags

    1. VLIW processors
    2. branch prediction
    3. low-power design

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    GLSVLSI04
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    GLSVLSI04: Great Lakes Symposium on VLSI 2004
    April 26 - 28, 2004
    MA, Boston, USA

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    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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    Cited By

    View all
    • (2020)Energy Efficient On-Demand Dynamic Branch Prediction ModelsIEEE Transactions on Computers10.1109/TC.2019.295671069:3(453-465)Online publication date: 1-Mar-2020
    • (2015)On-Demand Dynamic Branch PredictionIEEE Computer Architecture Letters10.1109/LCA.2014.233082014:1(50-53)Online publication date: 1-Jan-2015
    • (2015)Mobile ecosystem driven application-specific low-power control microarchitectureProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357186(720-727)Online publication date: 18-Oct-2015
    • (2012)Design space exploration of hybrid ultra low power branch predictorsProceedings of the 25th international conference on Architecture of Computing Systems10.1007/978-3-642-28293-5_16(184-199)Online publication date: 28-Feb-2012
    • (2008)Stall Power Reduction in Pipelined Architecture ProcessorsProceedings of the 21st International Conference on VLSI Design10.1109/VLSI.2008.34(541-546)Online publication date: 4-Jan-2008
    • (2008)A Novel Approach for Branch Buffer Consuming Power ReductionProceedings of the 2008 International Conference on Computer and Electrical Engineering10.1109/ICCEE.2008.48(436-440)Online publication date: 20-Dec-2008
    • (2007)A Power-aware Branch Predictor for Embedded ProcessorsThe KIPS Transactions:PartA10.3745/KIPSTA.2007.14-A.6.34714A:6(347-356)Online publication date: 31-Dec-2007
    • (2006)Fast Configuration of an Energy-Efficient Branch PredictorProceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures10.1109/ISVLSI.2006.44Online publication date: 2-Mar-2006
    • (2005)Low-power branch prediction techniques for VLIW architecturesIntegration, the VLSI Journal10.5555/1062115.106212738:3(515-524)Online publication date: 1-Jan-2005
    • (2005)Low-power branch prediction techniques for VLIW architecturesIntegration, the VLSI Journal10.1016/j.vlsi.2004.07.01238:3(515-524)Online publication date: 1-Jan-2005
    • Show More Cited By

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