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A VHDL MPEG-7 shape descriptor extractor

Published: 22 February 2004 Publication History

Abstract

The MPEG-7 video compression standard allows for multimedia metadata description. By providing robust descriptors and an effective framework for storing them, MPEG-7 is designed to provide a means of navigation through audio-visual content. In particular, MPEG-7 provides a region based shape descriptor, the Angular Radial Transform (ART), for use in image and video annotation and retrieval. For this work, an FPGA based ART extractor was designed and simulated for a Xilinx Virtex-E XCV300e in order to provide a speedup over software based extraction. The design created is capable of processing over 69,4400 pixels a minute. This design utilizes 99% of the FPGA's logical resources and operates at a clock rate of 25 MHz.

Cited By

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  • (2018)Toward hardware implementation of the compact color descriptor for real time video indexingAdvances in Engineering Software10.5555/1090505.109051136:7(475-486)Online publication date: 31-Dec-2018
  • (2018)Toward hardware implementation of the compact color descriptor for real time video indexingAdvances in Engineering Software10.1016/j.advengsoft.2005.01.00536:7(475-486)Online publication date: 31-Dec-2018
  • (2016)Hardware Acceleration of CBIR System with FPGA-Based PlatformField-Programmable Gate Array (FPGA) Technologies for High Performance Instrumentation10.4018/978-1-5225-0299-9.ch007(138-170)Online publication date: 2016

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cover image ACM Conferences
FPGA '04: Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
February 2004
266 pages
ISBN:1581138296
DOI:10.1145/968280
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 22 February 2004

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

View all
  • (2018)Toward hardware implementation of the compact color descriptor for real time video indexingAdvances in Engineering Software10.5555/1090505.109051136:7(475-486)Online publication date: 31-Dec-2018
  • (2018)Toward hardware implementation of the compact color descriptor for real time video indexingAdvances in Engineering Software10.1016/j.advengsoft.2005.01.00536:7(475-486)Online publication date: 31-Dec-2018
  • (2016)Hardware Acceleration of CBIR System with FPGA-Based PlatformField-Programmable Gate Array (FPGA) Technologies for High Performance Instrumentation10.4018/978-1-5225-0299-9.ch007(138-170)Online publication date: 2016

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