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A symbolic design system for integrated circuits

Authors:

S. EllisAuthors Info & Claims

DAC '82: Proceedings of the 19th Design Automation Conference

Pages 460 - 466

Published: 01 January 1982 Publication History

Abstract

As integrated circuit design has become increasingly complex, the need for more effective data description techniques has become critical. Design verification from mask artwork data alone can consume vaste amounts of computer time for VLSI circuits, if it can be performed at all. The use of a symbolic design description, which allows the designer or synthesis program to express circuit structure as well as maintain full connectivity information, can reduce dramatically the burden placed on the verification tools: This paper describes a symbolic design system, its associated data manager, its color graphics viewport manager, and its application to a variety of design methods. The data manager can store a variety of representations of the design, including simulation data, geometric layout, symbolic layout, and schematic diagrams. The viewport manager can manage a number of viewports concurrently and the use of a model frame buffer allows it to function easily on a variety of graphics terminals and hard-copy devices. The system is designed with an engineering work station in mind.

References

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L. A. O'Neill et al., "Designer's Workbench—Efficient and Economical Design Aids," Proc. 16th Design Automation Conference, June 1979, pp. 185-199.

Digital Library

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J. D. Crawford, "A Unified Hardware Description Language for CAD Programs," ERL Memo. No. UCB/ERL M79/64, Univ. of California, Berkeley, Aug. 1979.

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C. H. Sequin and A. R. Newton, "A Structured Interchange Format for the Description of Integrated Circuits," Univ. of California, Berkeley, May 1980.

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L. M. Rosenberg, "The Evolution of Design Automation to Meet the Challenges of VLSI," Proc. 17th Design Automation Conference, June 1980, pp. 3-11

Digital Library

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T. Guttman, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, Private Communication.

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S. A. Ellis, K. H. Keller, A. R, Newton, D. O. Pedenson, A. L. Sangiovanni-Vincentelli, and C. H. Sequin. "A Symbolic Layout Design System," Proc. IEEE Int. Symp. Circuits and Syst., Rome, Italy, May 1982.

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R. P. Larson, "Versatile Mask Generation Technique for Custom Microelectronic Devices," Proc. 15th Design Automation Conference, pp. 193-198, June 1978.

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D. Gibson and S. Nance, "SLIC - Symbolic Layout of Integrated Circuits," Proc. 13th Design Automation Conference, pp. 434-440, June 1976.

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J. D. Williams, "STICKS - A Graphical Compiler for High-Level LSI Design," Proc. AFIPS Conference, Vol. 47, pp. 289-295, June 1978.

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M. Y. Hsueh, "Symbolic Layout and Compaction of Integrated Circuits," ERL Memo. No. UCB/ERL M79/80, University of California, Berkeley, Dec. 1979.

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A. E. Dunlop, "SLIP: Symbolic Layout of Integrated Circuits with Compaction," Computer-Aided Design, vol. 10, No. 6, pp. 387-391, Nov. 1978.

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N. Weste, "Virtual Grid Symbolic Layout," Proc. 18th Design Automation Conference, June 1981, pp. 225-233.

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Y. E. Cho, A. J. Korenjak, and D. E. Stockton, "FLOSS: An Approach to Automated Layout for High-Volume Designs," Proc. 14th Design Automation Conference, pp. 138-141, June 1977.

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K. Hardage, "ASAP: Advanced Symbolic Artwork Preparation," LAMBDA, Vol. 1, No. 3, Fall 1980, pp. 32-39.

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S. Trimberger, "The Proposed Sticks Standard," Computer Sciences Dept. SSP File 3880, California Institute of Technology, Oct. 1980.

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M. W. Bales, "Layout Rule Spacing of Symbolic IC Art-work," MS Report, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, May 1982.

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The RISC Microprocessor was developed at U. C. Berkeley by a group of students working with Professor D. A. Patterson in 1981.

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P. Moore, "The FANG User's Guide," Internal Memo., Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, May 1982.

Cited By

Lunow RShaklee DNewton A(1988)A channelless, multilayer routerProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285844(667-671)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285844
Henkel VGolze UShaklee DNewton A(1988)RISCE—a reduced instruction set circuit extractor for hierarchical VLSI layout verificationProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285805(465-470)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285805
Lin BNewton A(1987)KAHLUA: a hierarchical circuit disassemblerProceedings of the 24th ACM/IEEE Design Automation Conference10.1145/37888.37935(311-317)Online publication date: 1-Oct-1987
https://dl.acm.org/doi/10.1145/37888.37935
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Index Terms

A symbolic design system for integrated circuits
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
  2. Integrated circuits

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cover image ACM Conferences

DAC '82: Proceedings of the 19th Design Automation Conference

January 1982

919 pages

ISBN:0897910206

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IEEE Press

Publication History

Published: 01 January 1982

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Lunow RShaklee DNewton A(1988)A channelless, multilayer routerProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285844(667-671)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285844
Henkel VGolze UShaklee DNewton A(1988)RISCE—a reduced instruction set circuit extractor for hierarchical VLSI layout verificationProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285805(465-470)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285805
Lin BNewton A(1987)KAHLUA: a hierarchical circuit disassemblerProceedings of the 24th ACM/IEEE Design Automation Conference10.1145/37888.37935(311-317)Online publication date: 1-Oct-1987
https://dl.acm.org/doi/10.1145/37888.37935
Udagawa YMizoguchi T(1986)An Extended Relational Database System and It's Application to Management of Logic DiagramaProceedings of the 12th International Conference on Very Large Data Bases10.5555/645913.671477(267-277)Online publication date: 25-Aug-1986
https://dl.acm.org/doi/10.5555/645913.671477
Katz RAnwarrudin MChang EThomas D(1986)A version server for computer-aided design dataProceedings of the 23rd ACM/IEEE Design Automation Conference10.5555/318013.318019(27-33)Online publication date: 2-Jul-1986
https://dl.acm.org/doi/10.5555/318013.318019
Van Vlierberghe SRijmenants JHeyns WOfek HO'Neill L(1985)Symbolic hierarchical artwork generation systemProceedings of the 22nd ACM/IEEE Design Automation Conference10.5555/317825.317994(789-793)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.5555/317825.317994
Scheffer LSoetarman ROfek HO'Neill L(1985)Hierarchical analysis of IC artwork with user defined abstraction rulesProceedings of the 22nd ACM/IEEE Design Automation Conference10.5555/317825.317873(293-298)Online publication date: 1-Jun-1985
https://dl.acm.org/doi/10.5555/317825.317873
Roach JLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)The rectangle placement languageProceedings of the 21st Design Automation Conference10.5555/800033.800830(405-411)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800830
Scott WOusterhout JLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)PlowingProceedings of the 21st Design Automation Conference10.5555/800033.800792(166-172)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800792
Ungar DBlau RFoley PSamples DPatterson DAgrawal D(1984)Architecture of SOARProceedings of the 11th annual international symposium on Computer architecture10.1145/800015.808182(188-197)Online publication date: 1-Jan-1984
https://dl.acm.org/doi/10.1145/800015.808182
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