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An approach to using VLSI in digital systems

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Suhas S. Patil,

Terry WelchAuthors Info & Claims

ISCA '78: Proceedings of the 5th annual symposium on Computer architecture

Pages 139 - 143

https://doi.org/10.1145/800094.803040

Published: 03 April 1978 Publication History

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Abstract

We explore the use of a proposed general purpose programmable Storage/Logic Array chip (SLA) as a universal logic element for digital computers. Design examples are given to show how SLAs could be used in computer design. This approach to VLSI is compared and contrasted with other contending approaches using microprocessors, gate arrays and customized VLSI chips. The SLA appears attractive because of low cost, reasonable high performance and shorter implementation time.

References

[1]

Patil, Suhas S. Storage/Logic Array (SLA): "A Universal Logic Chip," A paper in preparation. Dept. of Computer Science, University of Utah Salt Lake City, Utah.

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[2]

Patil, Suhas S. "An Asynchronous Logic Array," Technical memo TM-62, May 1975, Project MAC, MIT, Cambridge, Mass.

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[3]

Patil, Suhas S. "Micro-control for Parallel Asynchronous Computers," Proceedings of Euromicro 1975. North-Holland Publishing, Co.

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[4]

Fleisher, H. and L. I. Maissel, "An Introduction to Array Logic", IBM Journal of Research and Development, March 1975, pp 98-109.

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[5]

Logue, J. E., et al, "Hardware Implementation of a Small System in Programmable Logic Arrays", IBM Journal of Research and Development, March 1975, pp 110-119.

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Savin HBucknell MSpaulding MMaciukenas TKent Fuchs W(1994)Design for concurrent error detection and testability in storage/logic arraysIEEE Journal of Solid-State Circuits10.1109/4.30371429:7(770-779)Online publication date: Jul-1994
https://doi.org/10.1109/4.303714
Bucknell MFuchs WSavin H(1988)Design of testable storage/logic arrays1988., IEEE International Symposium on Circuits and Systems10.1109/ISCAS.1988.14904(209-212)Online publication date: 1988
https://doi.org/10.1109/ISCAS.1988.14904
Swartzlander E(1980)Signal processing architectures with VLSIICASSP '80. IEEE International Conference on Acoustics, Speech, and Signal Processing10.1109/ICASSP.1980.1170949(368-371)Online publication date: 1980
https://doi.org/10.1109/ICASSP.1980.1170949
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Index Terms

An approach to using VLSI in digital systems
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Combinational circuits
  2. Very large scale integration design

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Published In

ISCA '78: Proceedings of the 5th annual symposium on Computer architecture

April 1978

256 pages

ISBN:9781450374002

DOI:10.1145/800094

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 April 1978

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Cited By

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Savin HBucknell MSpaulding MMaciukenas TKent Fuchs W(1994)Design for concurrent error detection and testability in storage/logic arraysIEEE Journal of Solid-State Circuits10.1109/4.30371429:7(770-779)Online publication date: Jul-1994
https://doi.org/10.1109/4.303714
Bucknell MFuchs WSavin H(1988)Design of testable storage/logic arrays1988., IEEE International Symposium on Circuits and Systems10.1109/ISCAS.1988.14904(209-212)Online publication date: 1988
https://doi.org/10.1109/ISCAS.1988.14904
Swartzlander E(1980)Signal processing architectures with VLSIICASSP '80. IEEE International Conference on Acoustics, Speech, and Signal Processing10.1109/ICASSP.1980.1170949(368-371)Online publication date: 1980
https://doi.org/10.1109/ICASSP.1980.1170949
Swartzlander E(1980)VLSI ArchitectureVery Large Scale Integration (VLSI)10.1007/978-3-662-01003-7_6(178-221)Online publication date: 1980
https://doi.org/10.1007/978-3-662-01003-7_6
(1978)BIBLIOGRAPHYComputer Engineering10.1016/B978-0-932376-00-8.50036-0(553-561)Online publication date: 1978
https://doi.org/10.1016/B978-0-932376-00-8.50036-0

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