Data buffer performance for sequential Prolog architectures
Author: 
E. TickAuthors Info & Claims
Pages 434 - 442
Abstract
Several local data buffers are proposed and measurements are presented for variations of the Warren Abstract Machine (WAM) architecture for Prolog. Choice point buffers, stack buffers, split-stack buffers, multiple register sets, copyback caches, and “smart” caches are examined. Statistics collected from four benchmark programs indicate that small conventional local memories perform quite well because of the WAM's high locality. The data memory performance results are equally valid for native code and reduced instruction set implementations of Prolog.
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Index Terms
- Data buffer performance for sequential Prolog architectures
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Copyright © 1988 Author.
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Association for Computing Machinery
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Published: 17 May 1988
Published in SIGARCH Volume 16, Issue 2
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