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Board-level multiterminal net assignment

Published: 18 April 2002 Publication History

Abstract

The paper presents a satisfiability-based method for solving the board-level multiterminal net routing problem in Clos-Folded FPGA based logic emulation systems. The approach transforms the FPGA board-level routing task into a single, large Boolean equation with the property that any assignment of input variables that satisfies the equation specifies a valid routing. The approach considers all nets simultaneously and the absence of a satisfying assignment implies that the layout is unroutable. We use two of the fastest SAT solvers: Chaff and DLM to perform our experiments. Empirical results show that the method is time-efficient and applicable to large layout problem instances.

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Cited By

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  • (2005)Compact propositional encoding of first-order theoriesProceedings of the 20th national conference on Artificial intelligence - Volume 110.5555/1619332.1619388(340-345)Online publication date: 9-Jul-2005
  • (2002)On segmented channel routability2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)10.1109/ISCAS.2002.1009804(I-169-I-172)Online publication date: 2002

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      cover image ACM Conferences
      GLSVLSI '02: Proceedings of the 12th ACM Great Lakes symposium on VLSI
      April 2002
      194 pages
      ISBN:1581134622
      DOI:10.1145/505306
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 18 April 2002

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      • (2005)Compact propositional encoding of first-order theoriesProceedings of the 20th national conference on Artificial intelligence - Volume 110.5555/1619332.1619388(340-345)Online publication date: 9-Jul-2005
      • (2002)On segmented channel routability2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)10.1109/ISCAS.2002.1009804(I-169-I-172)Online publication date: 2002

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