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Integration of message passing and shared memory in the Stanford FLASH multiprocessor

Authors:

Kourosh Gharachorloo,

Anoop GuptaAuthors Info & Claims

ACM SIGOPS Operating Systems Review, Volume 28, Issue 5

Pages 38 - 50

https://doi.org/10.1145/381792.195494

Published: 01 November 1994 Publication History

Abstract

The advantages of using message passing over shared memory for certain types of communication and synchronization have provided an incentive to integrate both models within a single architecture. A key goal of the FLASH (FLexible Architecture for SHared memory) project at Stanford is to achieve this integration while maintaining a simple and efficient design. This paper presents the hardware and software mechanisms in FLASH to support various message passing protocols. We achieve low overhead message passing by delegating protocol functionality to the programmable node controllers in FLASH and by providing direct user-level access to this messaging subsystem. In contrast to most earlier work, we provide an integrated solution that handles the interaction of the messaging protocols with virtual memory, protected multiprogramming, and cache coherence. Detailed simulation studies indicate that this system can sustain message-transfers rates of several hundred megabytes per second, effectively utilizing projected network bandwidths for next generation multiprocessors.

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Cited By

Kalokerinos GPapaefstathiou VNikiforos GKavadias SYang XPnevmatikatos DKatevenis M(2019)Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA CapabilityTransactions on High-Performance Embedded Architectures and Compilers V10.1007/978-3-662-58834-5_6(100-120)Online publication date: 23-Feb-2019
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Kachris CNikiforos GPapaefstathiou VKavadias SKatevenis M(2013)NP-SARCJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2012.11.00159:1(39-47)Online publication date: 1-Jan-2013
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Integration of message passing and shared memory in the Stanford FLASH multiprocessor

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Information & Contributors

Information

Published In

cover image ACM SIGOPS Operating Systems Review

ACM SIGOPS Operating Systems Review Volume 28, Issue 5

Dec. 1994

323 pages

ISSN:0163-5980

DOI:10.1145/381792

Chairman:
Henry M. Levy
Univ. of Washington, Seattle

Issue’s Table of Contents

ASPLOS VI: Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
November 1994
341 pages
ISBN:0897916603
DOI:10.1145/195473
Chairmen:
Forest Baskett
Silicon Graphics
,
Douglas Clark
Princeton Univ.

Copyright © 1994 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 November 1994

Published in SIGOPS Volume 28, Issue 5

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Cited By

Kalokerinos GPapaefstathiou VNikiforos GKavadias SYang XPnevmatikatos DKatevenis M(2019)Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA CapabilityTransactions on High-Performance Embedded Architectures and Compilers V10.1007/978-3-662-58834-5_6(100-120)Online publication date: 23-Feb-2019
https://doi.org/10.1007/978-3-662-58834-5_6
Kachris CNikiforos GPapaefstathiou VKavadias SKatevenis M(2013)NP-SARCJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2012.11.00159:1(39-47)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.1016/j.sysarc.2012.11.001
(2011)BibliographyDesigning Network On-Chip Architectures in the Nanoscale Era10.1201/b10477-18(443-475)Online publication date: 9-Feb-2011
https://doi.org/10.1201/b10477-18
Kachris CNikiforos GKavadias SPapaefstathiou VKatevenis M(2010)Network Processing in Multi-core FPGAs with Integrated Cache-Network InterfaceProceedings of the 2010 International Conference on Reconfigurable Computing and FPGAs10.1109/ReConFig.2010.51(328-333)Online publication date: 13-Dec-2010
https://dl.acm.org/doi/10.1109/ReConFig.2010.51
Kalokerinos GPapaefstathiou VNikiforos GKavadias SKatevenis MPnevmatikatos DYang X(2009)FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability2009 International Symposium on Systems, Architectures, Modeling, and Simulation10.1109/ICSAMOS.2009.5289226(149-156)Online publication date: Jul-2009
https://doi.org/10.1109/ICSAMOS.2009.5289226
Leverich JArakida HSolomatnikov AFiroozshahian AHorowitz MKozyrakis C(2008)Comparative evaluation of memory models for chip multiprocessorsACM Transactions on Architecture and Code Optimization10.1145/1455650.14556515:3(1-30)Online publication date: 1-Dec-2008
https://dl.acm.org/doi/10.1145/1455650.1455651
Rodman ABrorsson M(1999)Programming Effort vs. Performance with a Hybrid Programming Model for Distributed Memory Parallel ArchitecturesEuro-Par’99 Parallel Processing10.1007/3-540-48311-X_124(888-898)Online publication date: 6-Aug-1999
https://doi.org/10.1007/3-540-48311-X_124
Chapin JRosenblum MDevine SLahiri TTeodosiu DGupta A(1995)HiveACM SIGOPS Operating Systems Review10.1145/224057.22405929:5(12-25)Online publication date: 3-Dec-1995
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LeBeane MPotter BPan ADutu AAgarwala VLee WMajeti DGhimire BVan Tassell EWasmundt SBenton BBreternitz MChu MThottethodi MJohn LReinhardt SWest J(2016)Extended task queuingProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.5555/3014904.3015012(1-12)Online publication date: 13-Nov-2016
https://dl.acm.org/doi/10.5555/3014904.3015012
Asmussen NVölp MNöthen BHärtig HFettweis G(2016)M3ACM SIGARCH Computer Architecture News10.1145/2980024.287237144:2(189-203)Online publication date: 25-Mar-2016
https://dl.acm.org/doi/10.1145/2980024.2872371
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