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Automated printed circuit routing with a stepping aperture

Published: 01 May 1969 Publication History

Abstract

A computer program for routing interconnections on a two-sided printed circuit board with a regular pattern of lines, pins (terminals), and vias (feed-through holes) is described.
In this program, each interconnection is given a planned routing—typically, down from the upper pin, through a via, and horizontally to the lower pin. From the top, a virtual aperture (i.e. a long horizontal slit) is stepped down the board. The planned routing is the basis for rerouting interconnections within the aperture to resolve conflicts for lines and vias below the aperture and to maximize the effective line usage. If a conflict has not been resolved before the aperture arrives at the lower pin, interconnections are deleted to resolve the conflict.
Extensions of this technique to the control of crosstalk between routed interconnections and to the problem of obtaining 100 percent interconnect are also discussed.

References

[1]
LEE, C.Y. An algorithm for path connections and its applications. IEEE Trans. EC-IO (Sept. 1961).
[2]
PICXRELL, W. E. An automated interconnect design system. Proc. AFIPS 1965 Fall Joint Comput. Conf., Vol. 27, Pt. 2, Spartan Books, New York, pp. 1087-1092.
[3]
COMFORT, W. T. Multiword list items. Comm. ACM 7, 6 (June 1964), 357-362.

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cover image Communications of the ACM
Communications of the ACM  Volume 12, Issue 5
May 1969
95 pages
ISSN:0001-0782
EISSN:1557-7317
DOI:10.1145/362946
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 May 1969
Published in CACM Volume 12, Issue 5

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Author Tags

  1. aperture
  2. circuit board
  3. computer program
  4. interconnections
  5. lines
  6. pins
  7. printed circuit
  8. routing
  9. stepping aperture
  10. vias

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  • (2015)Automated Routing of Printed Circuit BoardsIETE Journal of Research10.1080/03772063.1978.1145160424:3-4(158-163)Online publication date: 11-Jul-2015
  • (2015)Automated Routing of Large-Scale CircuitsIETE Journal of Research10.1080/03772063.1977.1145139023:7(407-412)Online publication date: 11-Jul-2015
  • (2007)Computer‐aided interconnection routing: General survey of the state‐of‐the‐artNetworks10.1002/net.32300202062:2(167-183)Online publication date: 9-Mar-2007
  • (2006)A routing system based on a single‐row router and its wirabilityInternational Journal of Circuit Theory and Applications10.1002/cta.44900903049:3(285-296)Online publication date: 13-Dec-2006
  • (1988)Wire routing by optimizing channel assignment within large aperturesPapers on Twenty-five years of electronic design automation10.1145/62882.62884(35-49)Online publication date: 1-Jun-1988
  • (1987)Routing with a scanning window-8Ma unified approachProceedings of the 24th ACM/IEEE Design Automation Conference10.1145/37888.37987(629-632)Online publication date: 1-Oct-1987
  • (1987)Gridless detail routing with a frontACM SIGDA Newsletter10.1145/25278.2528017:2(53-54)Online publication date: 1-Jun-1987
  • (1984)Towards a Theory of VLSI LayoutAlgorithm Design for Computer System Design10.1007/978-3-7091-4338-4_9(229-236)Online publication date: 1984
  • (1983)Automatic routing of double layer gate arrays using a moving cursorProceedings of the 20th Design Automation Conference10.5555/800032.800738(644-650)Online publication date: 27-Jun-1983
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