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An Embedded Multi-Layer Spiral Square Inductor for Integrated Power Delivery - Physical Design and Analytical Models

Published: 12 June 2024 Publication History

Abstract

Planar inductors are widely utilized in traditional, PCB-level switching mode power supplies. To mitigate prohibitive power loss in modern high-performance integrated systems, power converters should be embedded closer to points-of-load (POLs). The large footprint and limited inductance density of planar inductors, is a primary concern in these modern power delivery architectures. To mitigate the insufficient inductor current density, vertically stacked on/in-interposer inductors have recently proposed. To facilitate vertically stacked inductors in practical systems, device architecture and respective analytical models are required. In this paper, a fully embedded multi-layer spiral square inductor is proposed to maximize inductance density through coupling. The inductor is designed and simulated with COMSOL Multiphysics, yielding the inductance density of up to 440 nH/mm2 (as compared to 127 nH/mm2 with state-of-the-art). Comprehensive design space exploration of inductor performance is, however, impractical with COMSOL due to high computational complexity of the underlying Finite Element Method (FEM). To facilitate an efficient exploration of tradeoffs with the proposed architecture, analytical physics-aware models are proposed. The model is validated based on COMSOL Multiphysics with up to ten layers, exhibiting over 95.8% accuracy with more than two layers.

References

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cover image ACM Conferences
GLSVLSI '24: Proceedings of the Great Lakes Symposium on VLSI 2024
June 2024
797 pages
ISBN:9798400706059
DOI:10.1145/3649476
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 12 June 2024

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Author Tags

  1. Integrated Inductor
  2. Multi-Layer Inductor
  3. POL Integration
  4. Vertical Power Delivery

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  • Research-article
  • Research
  • Refereed limited

Funding Sources

  • Semiconductor Research Corporation (SRC)
  • Defense Advanced Research Project Agency (DARPA)

Conference

GLSVLSI '24
Sponsor:
GLSVLSI '24: Great Lakes Symposium on VLSI 2024
June 12 - 14, 2024
FL, Clearwater, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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