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OpenACC Execution Models for Manycore Processor with ARM SVE

Published: 27 February 2023 Publication History

Abstract

OpenACC is designed to offer performance portability across CPUs with SIMD extensions and accelerators based on GPU or manycore architecture. We are working on the design of OpenACC compiler for A64FX manycore processor with Arm SVE. We use a source-to-source compiler infrastructure, Omni compiler, to generate the code with OpenMP SIMD directive and generate a translated code in OpenCL which is executed by OpenCL runtime for CPUs. We expect OpenACC to be used to exploit different levels of parallelism for NUMA node, cores in a NUMA node and SIMD vector by Arm SVE in A64FX manycore processor, more than conventional flat OpenMP parallel loops. The preliminary results of our source-to-source transformation with OpenMP SIMD directive is presented.

References

[1]
[1] “Supercomputer Fugaku” https://www.r-ccs.riken.jp/en/fugaku/
[2]
[2] Douglas Miles, David Norton, Michael Wolfe, “Performance Portability and OpenACC”, CUG 2014 Proceedings, 2014.
[3]
[3] Michael Wolfe, “OpenACC for Multicore CPUs” https://www.pgroup.com/blogs/posts/openacc-for-multicore.htm
[4]
[4] PoCL - Portable Computing Language, http://portablecl.org/
[5]
[5] M. Sato et al., “Co-Design for A64FX Manycore Processor and Fugaku”, SC20: International Conference for High Performance Computing, Networking, Storage and Analysis, 2020, pp. 1-15.
[6]
[6] A64FX Microarchitecture Manual,https://github.com/fujitsu/A64FX
[7]
[7] Omni Compiler Project, http://omni-compiler.org/
[8]
[8] Sato, Mitsuhisa, Eds, “XcalableMP PGAS Programming Language: From Programming Model to Applications”, Springer Singapore, 2020, https://doi.org/10.1007/978-981-15-7683-6
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[9] Valentin Clement, et. al. “The CLAW DSL: Abstractions for Performance Portable Weather and Climate Model”. In Proceedings of the Platform for Advanced Scientific Computing Conference (PASC ’18.). https://doi.org/10.1145/3218176.3218226
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[10] H. Takizawa, S. Hirasawa, Y. Hayashi, R. Egawa, and H. Kobayashi,”Xevolver: An XML-based Code Translation Framework for Supporting HPC Application Migration”, in Proc. IEEE Int’l Conf. High Performance Computing (HiPC), Dec. 2014, pp. 1?11.
[11]
[11] Tabuchi, A., Nakao, M., Sato, M. (2014). “A Source-to-Source OpenACC Compiler for CUDA”. Euro-Par 2013: Parallel Processing Workshops. Euro-Par 2013. Lecture Notes in Computer Science, vol 8374. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-54420-0_18
[12]
[12] RISC-V Vector Extension, https://github.com/riscv/riscv-v-spec

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Published In

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HPCAsia '23 Workshops: Proceedings of the HPC Asia 2023 Workshops
February 2023
101 pages
ISBN:9781450399890
DOI:10.1145/3581576
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 27 February 2023

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Author Tags

  1. Accelerator
  2. Multicore Processor
  3. OpenACC
  4. SIMD
  5. SVE(Scalable Vector Extension)

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  • Research-article
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  • Refereed limited

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HPCAsia2023 Workshop

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HPCAsia '23 Workshops Paper Acceptance Rate 9 of 10 submissions, 90%;
Overall Acceptance Rate 69 of 143 submissions, 48%

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