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Designing Hardware for Cryptography and Cryptography for Hardware

Published: 07 November 2022 Publication History

Abstract

There have been few high-impact deployments of hardware implementations of cryptographic primitives. We present the benefits and challenges of hardware acceleration of sophisticated cryptographic primitives and protocols, and briefly describe our recent work. We argue the significant potential for synergistic codesign of cryptography and hardware, where customized hardware accelerates cryptographic protocols that are designed with hardware acceleration in mind.

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Cited By

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  • (2023)Co-designing an FPGA-Accelerated Encryption Library With PYNQ: The Pynqrypt Case StudyIEEE EUROCON 2023 - 20th International Conference on Smart Technologies10.1109/EUROCON56442.2023.10198938(683-688)Online publication date: 6-Jul-2023

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      cover image ACM Conferences
      CCS '22: Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security
      November 2022
      3598 pages
      ISBN:9781450394505
      DOI:10.1145/3548606
      This work is licensed under a Creative Commons Attribution International 4.0 License.

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      Published: 07 November 2022

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      Author Tags

      1. cryptography
      2. hardware acceleration
      3. hardware security

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      • (2023)Co-designing an FPGA-Accelerated Encryption Library With PYNQ: The Pynqrypt Case StudyIEEE EUROCON 2023 - 20th International Conference on Smart Technologies10.1109/EUROCON56442.2023.10198938(683-688)Online publication date: 6-Jul-2023

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