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Low Power XNOR based Single Ended VCO Circuit Design with Dynamic Threshold MOS

Published: 04 November 2021 Publication History

Abstract

This paper proposes a single-ended voltage-controlled oscillator (VCO) circuit design using XNOR gate as the basic delay element and dynamic threshold MOS (DTMOS) as the tuning element at the output node of the delay stage. The proposed PN-DTMOS ring oscillator achieves a frequency tuning range of 4.41 GHz to 4.05 GHz with variations in tuning voltage from 0V to 0.7V. The power dissipation of the proposed VCO is as low as 1.071 mW. This VCO achieves a frequency tuning range of 1.46 GHz to 4.12 GHz and power dissipation in the range of 0.123 mW to 1.067 mW with variations in power supply voltage from 1V to 1.8V. Proposed VCO shows a phase noise of -72.88 dBc/Hz@1MHz with the figure of merit (FoM) of -152.52 dBc/Hz with PN-DTMOS varactor tuning. This new approach using the forward body biasing technique can adjust the transistor’s threshold voltage.

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IC3-2021: Proceedings of the 2021 Thirteenth International Conference on Contemporary Computing
August 2021
483 pages
ISBN:9781450389204
DOI:10.1145/3474124
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 04 November 2021

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Author Tags

  1. DTMOS
  2. Delay stage
  3. figure of merit
  4. phase noise

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