Power efficient photonic network-on-chip for a scalable GPU

Scaling trends of logic, memories, and interconnect networks lead towards dense many-core chips. Unfortunately, process yields and reticle sizes limit the scalability of large single-chip systems. Multi-chip systems break free of these areal limits, but ...

Scaling trends of logic, memories, and interconnect networks lead towards dense many-core chips. Unfortunately, process yields and reticle sizes limit the scalability of large single-chip systems. Multi-chip systems break free of these areal limits, but ...

Networks-on-Chips (NoCs) are meeting the growing inter-tile communication needs of multicore chips. However, achieving system scalability by utilizing hundreds of cores on-chip requires high performance, yet energy-efficient on-chip interconnects. As ...