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An Approximate Carry Estimating Simultaneous Adder with Rectification

Published: 07 September 2020 Publication History

Abstract

Approximate computing has in recent times found significant applications towards lowering power, area, and time requirements for arithmetic operations. Several works done in recent years have furthered approximate computing along these directions. In this work, we propose a new approximate adder that employs a carry prediction method. This allows parallel propagation of the carry allowing faster calculations. In addition to the basic adder design, we also propose a rectification logic which would enable higher accuracy for larger computations. Experimental results show that our adder produces results 91.2% faster than the conventional ripple-carry adder. In terms of accuracy, the addition of rectification logic to the basic design produces results that are more accurate than state-of-the-art adders like SARA[13] and BCSA[5] by 74%.

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References

[1]
O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram. 2018. RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder. IEEE Transactions on Circuits and Systems II: Express Briefs (2018), 1089--1093. https://doi.org/10.1109/TCSII.2016.2633307
[2]
M. S. Ansari, B. F. Cockburn, and J. Han. 2019. A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy. In 2019 Design, Automation Test in Europe Conference Exhibition (DATE). 928--931.
[3]
N. Binkert, B. Beckmann, G. Black, S.K. Reinhardt, A. Saidi, A. Basu, J. Hestness, D. R. Hower, T. Krishna, S. Sardashti, R. Sen, K. Sewell, M. Shoaib, N. Vaish, M.D. Hill, and D.A. Wood. 2011. The Gem5 Simulator. SIGARCH Comput. Archit. News (Aug 2011), 1--7. https://doi.org/10.1145/2024716.2024718
[4]
K. Du, P. Varman, and K. Mohanram. 2012. High performance reliable variable latency carry select addition. In Design, Automation Test in Europe Conference Exhibition (DATE). 1257--1262.
[5]
F. Ebrahimi-Azandaryani, O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram. 2020. Block-Based Carry Speculative Approximate Adder for Energy-Efficient Applications. IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 67, 1 (2020), 137--141. https://doi.org/10.1109/TCSII.2019.2901060
[6]
J. Han and M. Orshansky. 2013. Approximate computing: An emerging paradigm for energy-efficient design. In 2013 18th IEEE European Test Symposium (ETS). 1--6.
[7]
J. Hu and W. Qian. 2015. A new approximate adder with low relative error and correct sign calculation. In 2015 Design, Automation Test in Europe Conference Exhibition (DATE). 1449--1454.
[8]
J. Liang, J. Han, and F. Lombardi. 2013. New Metrics for the Reliability of Approximate and Probabilistic Adders. IEEE Trans. Comput., Vol. 62, 9 (2013), 1760--1771. https://doi.org/10.1109/TC.2012.146
[9]
N. Zhu, W. L. Goh, and K. S. Yeo. 2009. An enhanced low-power high-speed Adder For Error-Tolerant application. In Proceedings of the 12th International Symposium on Integrated Circuits. 69--72.
[10]
A. Raha and V. Raghunathan. 2017. Towards Full-System Energy-Accuracy Tradeoffs: A Case Study of An Approximate Smart Camera System. In Proceedings of the 54th Annual Design Automation Conference (DAC 17). 1--6.
[11]
M. Samadi, D.A. Jamshidi, J. Lee, and S. Mahlke. 2014. Paraprox: Pattern-based Approximation for Data Parallel Applications. In 19th ACM Architectural Support for Programming Languages and Operating Systems (ASPLOS). 35--50. https://doi.org/10.1145/2654822.2541948
[12]
Z. Wang, A. C. Bovik, H. R. Sheikh, and E. P. Simoncelli. 2004. Image quality assessment: from error visibility to structural similarity. IEEE Transactions on Image Processing, Vol. 13, 4 (2004), 600--612. https://doi.org/10.1109/TIP.2003.819861
[13]
W. Xu, S. S. Sapatnekar, and J. Hu. 2018. A Simple Yet Efficient Accuracy-Configurable Adder Design. IEEE Transactions on VLSI Systems (2018), 1112--1125. https://doi.org/10.1109/TVLSI.2018.2803081
[14]
R. Ye, T. Wang, F. Yuan, R. Kumar, and Q. Xu. 2013. On reconfiguration-oriented approximate adder design and its application. In 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). 48--54.
[15]
N. Zhu, W. L. Goh, and K. S. Yeo. 2011. Ultra low-power high-speed flexible Probabilistic Adder for Error-Tolerant Applications. In International SoC Design Conference. 393--396.
[16]
N. Zhu, W. L. Goh, W. Zhang, K. S. Yeo, and Z. H. Kong. 2010. Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing. IEEE Transactions on VLSI Systems (2010), 1225--1229. https://doi.org/10.1109/TVLSI.2009.2020591

Cited By

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  • (2024)Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)10.1109/VLSID60093.2024.00091(511-516)Online publication date: 6-Jan-2024
  • (2024)Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS)10.1109/LASCAS60203.2024.10506181(1-5)Online publication date: 27-Feb-2024
  • (2024)High-Speed Energy-Efficient Canny-Edge Detector Using Novel Approximate AdderVLSI for Embedded Intelligence10.1007/978-981-97-3756-7_28(369-378)Online publication date: 28-Oct-2024
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cover image ACM Other conferences
GLSVLSI '20: Proceedings of the 2020 on Great Lakes Symposium on VLSI
September 2020
597 pages
ISBN:9781450379441
DOI:10.1145/3386263
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 September 2020

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  1. accuracy
  2. approximate adder
  3. carry estimation
  4. delay
  5. image processing
  6. rectification logic
  7. systems level simulations

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GLSVLSI '20
GLSVLSI '20: Great Lakes Symposium on VLSI 2020
September 7 - 9, 2020
Virtual Event, China

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

View all
  • (2024)Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)10.1109/VLSID60093.2024.00091(511-516)Online publication date: 6-Jan-2024
  • (2024)Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS)10.1109/LASCAS60203.2024.10506181(1-5)Online publication date: 27-Feb-2024
  • (2024)High-Speed Energy-Efficient Canny-Edge Detector Using Novel Approximate AdderVLSI for Embedded Intelligence10.1007/978-981-97-3756-7_28(369-378)Online publication date: 28-Oct-2024
  • (2024)A Hybrid Approximate Adder for Energy-Efficient ComputingVLSI for Embedded Intelligence10.1007/978-981-97-3756-7_1(1-14)Online publication date: 28-Oct-2024
  • (2023) VADF: V ersatile A pproximate D ata F ormats for Energy-Efficient Computing ACM Transactions on Embedded Computing Systems10.1145/360910622:5s(1-21)Online publication date: 9-Sep-2023
  • (2023)Locate: Low-Power Viterbi Decoder Exploration using Approximate AddersProceedings of the Great Lakes Symposium on VLSI 202310.1145/3583781.3590314(409-413)Online publication date: 5-Jun-2023
  • (2023)DARK-Adders: Digital Hardware Trojan Attack on Block-based Approximate Adders2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID)10.1109/VLSID57277.2023.00080(371-376)Online publication date: Jan-2023
  • (2022)EFCSA: An Efficient Carry Speculative Approximate Adder with Rectification2022 23rd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED54688.2022.9806249(1-7)Online publication date: 6-Apr-2022
  • (2022)HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications2022 23rd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED54688.2022.9806220(1-5)Online publication date: 6-Apr-2022
  • (2022)ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications2022 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS48785.2022.9937437(1640-1644)Online publication date: 28-May-2022
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