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Speculator: a tool to analyze speculative execution attacks and mitigations

Published: 09 December 2019 Publication History

Abstract

Speculative execution attacks exploit vulnerabilities at a CPU's microarchitectural level, which, until recently, remained hidden below the instruction set architecture, largely undocumented by CPU vendors. New speculative execution attacks are released on a monthly basis, showing how aspects of the so-far unexplored microarchitectural attack surface can be exploited. In this paper, we introduce, Speculator, a new tool to investigate these new microarchitectural attacks and their mitigations, which aims to be the GDB of speculative execution. Using speculative execution markers, set of instructions that we found are observable through performance counters during CPU speculation, Speculator can study microarchitectural behavior of single snippets of code, or more complex attacker and victim scenarios (e.g. Branch Target Injection (BTI) attacks). We also present our findings on multiple CPU platforms showing the precision and the flexibility offered by Speculator and its templates.

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ACSAC '19: Proceedings of the 35th Annual Computer Security Applications Conference
December 2019
821 pages
ISBN:9781450376280
DOI:10.1145/3359789
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Published: 09 December 2019

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  1. hardware reverse engineering
  2. hardware security
  3. hardware side-channels

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ACSAC '19
ACSAC '19: 2019 Annual Computer Security Applications Conference
December 9 - 13, 2019
Puerto Rico, San Juan, USA

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ACSAC '19 Paper Acceptance Rate 60 of 266 submissions, 23%;
Overall Acceptance Rate 104 of 497 submissions, 21%

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Cited By

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  • (2024)CuMONITOR: Continuous Monitoring of Microarchitecture for Software Task Identification and ClassificationDigital Threats: Research and Practice10.1145/36528615:3(1-22)Online publication date: 28-Mar-2024
  • (2024)ReminISCence: Trusted Monitoring Against Privileged Preemption Side-Channel AttacksComputer Security – ESORICS 202410.1007/978-3-031-70903-6_2(24-44)Online publication date: 5-Sep-2024
  • (2023)Ultimate SLHProceedings of the 32nd USENIX Conference on Security Symposium10.5555/3620237.3620636(7125-7142)Online publication date: 9-Aug-2023
  • (2023)PMU-Spill: A New Side Channel for Transient Execution AttacksIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2023.329891370:12(5048-5059)Online publication date: Dec-2023
  • (2023)Exploration and Exploitation of Hidden PMU Events2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323695(1-9)Online publication date: 28-Oct-2023
  • (2023)You Cannot Always Win the Race: Analyzing mitigations for branch target prediction attacks2023 IEEE 8th European Symposium on Security and Privacy (EuroS&P)10.1109/EuroSP57164.2023.00046(671-686)Online publication date: Jul-2023
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