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An axiomatic approach to code optimization for expressions

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James C. BeattyAuthors Info & Claims

Journal of the ACM (JACM), Volume 19, Issue 4

Pages 613 - 640

https://doi.org/10.1145/321724.321728

Published: 01 October 1972 Publication History

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Shirinzadeh SDrechsler RShirinzadeh SDrechsler R(2023)Synthese für Logic-in-Memory-Computing mit RRAMIn-Memory-Computing10.1007/978-3-031-22879-7_4(49-85)Online publication date: 8-Jun-2023
https://doi.org/10.1007/978-3-031-22879-7_4
Shirinzadeh SDrechsler RShirinzadeh SDrechsler R(2019)Synthesis for Logic-in-Memory Computing Using RRAMIn-Memory Computing10.1007/978-3-030-18026-3_4(49-81)Online publication date: 23-May-2019
https://doi.org/10.1007/978-3-030-18026-3_4
Shirinzadeh SSoeken MGaillardon PDrechsler R(2018)Logic Synthesis for RRAM-Based In-Memory ComputingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.275006437:7(1422-1435)Online publication date: Jul-2018
https://doi.org/10.1109/TCAD.2017.2750064
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An axiomatic approach to code optimization for expressions

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Published In

Journal of the ACM Volume 19, Issue 4

Oct. 1972

188 pages

ISSN:0004-5411

EISSN:1557-735X

DOI:10.1145/321724

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 October 1972

Published in JACM Volume 19, Issue 4

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Shirinzadeh SDrechsler RShirinzadeh SDrechsler R(2023)Synthese für Logic-in-Memory-Computing mit RRAMIn-Memory-Computing10.1007/978-3-031-22879-7_4(49-85)Online publication date: 8-Jun-2023
https://doi.org/10.1007/978-3-031-22879-7_4
Shirinzadeh SDrechsler RShirinzadeh SDrechsler R(2019)Synthesis for Logic-in-Memory Computing Using RRAMIn-Memory Computing10.1007/978-3-030-18026-3_4(49-81)Online publication date: 23-May-2019
https://doi.org/10.1007/978-3-030-18026-3_4
Shirinzadeh SSoeken MGaillardon PDrechsler R(2018)Logic Synthesis for RRAM-Based In-Memory ComputingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.275006437:7(1422-1435)Online publication date: Jul-2018
https://doi.org/10.1109/TCAD.2017.2750064
Shirinzadeh SSoeken MGaillardon PDrechsler R(2017)Logic Synthesis for Majority Based In-Memory ComputingAdvances in Memristors, Memristive Devices and Systems10.1007/978-3-319-51724-7_17(425-448)Online publication date: 17-Feb-2017
https://doi.org/10.1007/978-3-319-51724-7_17
Chattopadhyay ARakosi Z(2011)Combinational logic synthesis for material implication2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip10.1109/VLSISoC.2011.6081665(200-203)Online publication date: Oct-2011
https://doi.org/10.1109/VLSISoC.2011.6081665
Cortadella J(2006)Timing-driven logic bi-decompositionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2003.81144722:6(675-685)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2003.811447
Hartley RCasavant A(2006)Optimizing pipelined networks of associative and commutative operatorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.32927113:11(1418-1425)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.329271
Aho ASethi R(2005)How hard is compiler code generation?Automata, Languages and Programming10.1007/3-540-08342-1_1(1-15)Online publication date: 24-May-2005
https://doi.org/10.1007/3-540-08342-1_1
Hartley RCasavant A(1989)Tree-height minimization in pipelined architectures1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers10.1109/ICCAD.1989.76916(112-115)Online publication date: 1989
https://doi.org/10.1109/ICCAD.1989.76916
Kozhevnikova GSinitskii A(1984)Tree transformation problem in microparallelism algorithmsCybernetics10.1007/BF0106875419:5(604-614)Online publication date: 1984
https://doi.org/10.1007/BF01068754
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