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BASMAT: bottleneck-aware sparse matrix-vector multiplication auto-tuning on GPGPUs

Authors:

Athena Elafrou,

Georgios Goumas,

Nectarios KozirisAuthors Info & Claims

PPoPP '19: Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming

Pages 423 - 424

https://doi.org/10.1145/3293883.3301490

Published: 16 February 2019 Publication History

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Abstract

In this work, we present a bottleneck-aware sparse matrix-vector multiplication auto-tuner (BASMAT) for general purpose graphics processing units (GPGPUs) that targets both fast execution and low preprocessing overheads.

References

[1]

Kornilios Kourtis, Georgios Goumas, and Nectarios Koziris. 2008. Optimizing Sparse Matrix-vector Multiplication Using Index and Value Compression. In Proceedings of the 5th Conference on Computing Frontiers (CF '08). ACM, New York, NY, USA, 87--96.

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[2]

Weifeng Liu and Brian Vinter. 2015. CSR5: An Efficient Storage Format for Cross-Platform Sparse Matrix-Vector Multiplication. In Proceedings of the 29th ACM on International Conference on Supercomputing (ICS '15). ACM, New York, NY, USA, 339--350.

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[3]

Duane Merrill and Michael Garland. 2016. Merge-based Sparse Matrix-vector Multiplication (SpMV) Using the CSR Storage Format. In Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP '16). ACM, New York, NY, USA, Article 43, 2 pages.

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[4]

Bor-Yiing Su and Kurt Keutzer. 2012. clSpMV: A Cross-Platform OpenCL SpMV Framework on GPUs. In Proceedings of the 26th ACM International Conference on Supercomputing (ICS '12). ACM, New York, NY, USA, 353--364.

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Cited By

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Ma MHuang XXu JJia D(2024)Implementation and optimization of SpMV algorithm based on SW26010P many-core processor and stored in BCSR formatScientific Reports10.1038/s41598-024-67462-314:1Online publication date: 17-Jul-2024
https://doi.org/10.1038/s41598-024-67462-3
Gao JJi WLiu JWang YShi F(2024)Revisiting thread configuration of SpMV kernels on GPUJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.104799185:COnline publication date: 4-Mar-2024
https://dl.acm.org/doi/10.1016/j.jpdc.2023.104799
Xiao GYin CZhou TLi XChen YLi K(2023)A Survey of Accelerating Parallel Sparse Linear AlgebraACM Computing Surveys10.1145/360460656:1(1-38)Online publication date: 28-Aug-2023
https://dl.acm.org/doi/10.1145/3604606
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Index Terms

BASMAT: bottleneck-aware sparse matrix-vector multiplication auto-tuning on GPGPUs
1. Mathematics of computing
  1. Mathematical analysis
    1. Numerical analysis
      1. Computations on matrices
2. Software and its engineering
  1. Software organization and properties
    1. Extra-functional properties
      1. Software performance

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Information & Contributors

Information

Published In

PPoPP '19: Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming

February 2019

472 pages

ISBN:9781450362252

DOI:10.1145/3293883

General Chair:
Jeff Hollingsworth
University of Maryland
,
Program Chair:
Idit Keidar
Technion, Israel

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 16 February 2019

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PPoPP '19

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PPoPP '19: 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

February 16 - 20, 2019

District of Columbia, Washington

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PPoPP '19 Paper Acceptance Rate 29 of 152 submissions, 19%;

Overall Acceptance Rate 230 of 1,014 submissions, 23%

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Cited By

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Ma MHuang XXu JJia D(2024)Implementation and optimization of SpMV algorithm based on SW26010P many-core processor and stored in BCSR formatScientific Reports10.1038/s41598-024-67462-314:1Online publication date: 17-Jul-2024
https://doi.org/10.1038/s41598-024-67462-3
Gao JJi WLiu JWang YShi F(2024)Revisiting thread configuration of SpMV kernels on GPUJournal of Parallel and Distributed Computing10.1016/j.jpdc.2023.104799185:COnline publication date: 4-Mar-2024
https://dl.acm.org/doi/10.1016/j.jpdc.2023.104799
Xiao GYin CZhou TLi XChen YLi K(2023)A Survey of Accelerating Parallel Sparse Linear AlgebraACM Computing Surveys10.1145/360460656:1(1-38)Online publication date: 28-Aug-2023
https://dl.acm.org/doi/10.1145/3604606
Galanopoulos DMpakos PAnastasiadis PKoziris NGoumas G(2023)Invited paper: An Artificial Matrix Generator for Multi-platform SpMV Performance Analysis2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW59300.2023.00099(574-577)Online publication date: May-2023
https://doi.org/10.1109/IPDPSW59300.2023.00099
Mpakos PGalanopoulos DAnastasiadis PPapadopoulou NKoziris NGoumas G(2023)Feature-based SpMV Performance Analysis on Contemporary Devices2023 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS54959.2023.00072(668-679)Online publication date: May-2023
https://doi.org/10.1109/IPDPS54959.2023.00072
Pavon JValdivieso IBarredo AMarimon JMoreto MMoll FUnsal OValero MCristal A(2021)VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00081(921-934)Online publication date: Feb-2021
https://doi.org/10.1109/HPCA51647.2021.00081
Wang QZheng LZhao JLiao XJin HXue J(2020)A Conflict-free Scheduler for High-performance Graph Processing on Multi-pipeline FPGAsACM Transactions on Architecture and Code Optimization10.1145/339052317:2(1-26)Online publication date: 29-May-2020
https://dl.acm.org/doi/10.1145/3390523
Xiao GChen YLiu CZhou X(2020)ahSpMV: An Autotuning Hybrid Computing Scheme for SpMV on the Sunway ArchitectureIEEE Internet of Things Journal10.1109/JIOT.2019.29472577:3(1736-1744)Online publication date: Mar-2020
https://doi.org/10.1109/JIOT.2019.2947257
Elafrou AGoumas GKoziris NTaufer MBalaji PPeña A(2019)Conflict-free symmetric sparse matrix-vector multiplication on multicore architecturesProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3295500.3356148(1-15)Online publication date: 17-Nov-2019
https://dl.acm.org/doi/10.1145/3295500.3356148
Chen YXiao GWu FTang Z(2019)Towards Large-Scale Sparse Matrix-Vector Multiplication on the SW26010 Manycore Architecture2019 IEEE 21st International Conference on High Performance Computing and Communications; IEEE 17th International Conference on Smart City; IEEE 5th International Conference on Data Science and Systems (HPCC/SmartCity/DSS)10.1109/HPCC/SmartCity/DSS.2019.00203(1469-1476)Online publication date: Aug-2019
https://doi.org/10.1109/HPCC/SmartCity/DSS.2019.00203
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