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GENERIC: a silicon compiler support language

Published: 02 July 1986 Publication History

Abstract

We describe a support language, GENERIC, for producing high quality, general purpose layout in a silicon compiler. Since layout is the critical bottleneck to producing high-quality integrated circuits in silicon compilers, better methods are needed for this critical task. GENERIC forms a rich semantic base for describing and manipulating layout in a VLSI design system, enabling more complex layout to be generated. No particular design style is imposed by the language; Instead, operators and data structures are provided for efficient and effective manipulation of the layout. The operators form a more abstract basis for implementing layout strategies, and yet are still inherently efficient.
Using the operators and data structures of GENERIC, a unification of extant techniques is presented, as well as extensions of the layout methodology in ways not possible with existing techniques. Furthermore, GENERIC contains a novel mechanism called planes which allows arbitrary topological manipulations in a way that guarantees design rule correctness.

References

[1]
Thomas S. Hedges, Ken H. Slater, Gary W. Clow, and Telle Whitney, "The Siclops Silicon Compiler," Proceedings of{CCC "82, pp. 277-280 (Sep. 1982).
[2]
M.Y. Hsueh, "Symbolic Layout and Compaction of Integrated Circuits," Ph. D. Thesis, EECS Dept., University of California at Berkeley, (1979).
[3]
Dave Johannsen, "Bristle Blocks: A Silicon Compiler," Proceedings of the Sixteenth Design Automation Conference, pp. 310-313 (June 1979).
[4]
Robert N. Mayo and John K. Ousterhout, "Pictures with Parenthesis: Combining graphics and procedures in a VLSI layout tool," Proceedings of the Twentieth Design Automation Conference, pp. 365-370 (June 1983).
[5]
John K. Ousterhout, "Crystal: A Timing Analyzer of nMOS VLSI Circuits," 3rd Caltech Conf of VLSI, pp. 57-70 (March 1983).
[6]
John K. Ousterhout, Gordon T. Hamachi, Robert Mayo, Walter S. Scott, and George S. Tailor, "Magic: A VI,SI Layout System," Proceedings of the Twenty First Design Automation Conference, pp. 152-159 (June 1984).
[7]
Jeffrey Mark Siskind, Jay Roger Southard, and Kenneth Walter Crouch, "Generating Custom High Performance VLSI Designs from Succinct Descriptions," Proceedings, Conference on Advanced Research in VLSI, Artech House, (January, 1982).
[8]
Jon A. Solworth, The GENERIC._' Pro~rc, mmin~ Lan~ua~e Manuc, l, Computer Science Department, Ithaca, NY (.September 1985).
[9]
Jort A. Solworth, "Cell libraries for silicon compilers," Proceedin,~,s" o/'ICCAD-85, INov. 1985).
[10]
N. H. E. Weste, '"Mulga-- an Interactive Symbolic Layout System for the Design of Integrated Circuits," The Bell System Technical dournat, (July-August 1981).
[11]
Colin Whitby-Stevens, "The transputer," The i2th Annual Intl. Symp. on Computer Architecture, pp. 292-.301 (June, 1985).
[12]
Wayne Wolf, John Newkirk, and Robert Mathews, "Dumbo, a schematics-to-layout compiler," 3rd C,2ltech Con/: of VL,'~'I, pp 379-393 (March 1983).

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cover image ACM Conferences
DAC '86: Proceedings of the 23rd ACM/IEEE Design Automation Conference
July 1986
835 pages
ISBN:0818607025
  • Chairman:
  • Don Thomas

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IEEE Press

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Published: 02 July 1986

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DAC '86 Paper Acceptance Rate 124 of 300 submissions, 41%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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