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Neuromorphic Computing based on Resistive RAM

Authors:

He QianAuthors Info & Claims

GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017

Pages 311 - 315

https://doi.org/10.1145/3060403.3066873

Published: 10 May 2017 Publication History

Abstract

Resistive random access memory (RRAM) has gained significant attentions because of its excellent characteristics which are suitable for next-generation non-volatile memory applications. It is also very attractive to build neuromorphic computing chip based on RRAM cells due to non-volatile and analog properties. Neuromorphic computing hardware technologies using analog weight storage allow the scaling-up of the system size to complete cognitive tasks such as face classification much faster while consuming much lower energy. In this paper, RRAM technology development from material selection to device structure, from small array to full chip will be discussed in detail. Neuromorphic computing using RRAM devices is demonstrated, and speed & energy consumption are compared with Xeon Phi processor.

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Cited By

Shi LHu HJia ZNie YXi YLi ZLiu HChen C(2024)Optimal Designs of 1T1R Structure to Reduce the Transistor IR Drop2024 7th International Conference on Electronics Technology (ICET)10.1109/ICET61945.2024.10672828(254-258)Online publication date: 17-May-2024
https://doi.org/10.1109/ICET61945.2024.10672828
Wu TLiu KXiao CLiu BZhuge QSha E(2020)Multigranularity Space Management Scheme for Accelerating the Write Performance of In-Memory File SystemsIEEE Systems Journal10.1109/JSYST.2020.297567314:4(5429-5440)Online publication date: Dec-2020
https://doi.org/10.1109/JSYST.2020.2975673
Kim JKim YKhan APark S(2019)Understanding the performance of storage class memory file systems in the NUMA architectureCluster Computing10.1007/s10586-018-2833-422:2(347-360)Online publication date: 1-Jun-2019
https://dl.acm.org/doi/10.1007/s10586-018-2833-4
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Index Terms

Neuromorphic Computing based on Resistive RAM
1. Computing methodologies
  1. Machine learning
    1. Machine learning approaches
2. Hardware
  1. Emerging technologies

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Published In

cover image ACM Conferences

GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017

May 2017

516 pages

ISBN:9781450349727

DOI:10.1145/3060403

General Chairs:
Laleh Behjat
University of Calgary, Canada
,
Jie Han
University of Alberta, Canada
,
Program Chairs:
Miroslav N. Velev
Aries Design Automation, USA
,
Deming Chen
University of Illinois, USA

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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IEEE CEDA
IEEE CASS

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 10 May 2017

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Funding Sources

China key research and development program
NSFC
National Hi-tech (R&D) project of China
863 program

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GLSVLSI '17

Sponsor:

SIGDA

GLSVLSI '17: Great Lakes Symposium on VLSI 2017

May 10 - 12, 2017

Alberta, Banff, Canada

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GLSVLSI '17 Paper Acceptance Rate 48 of 197 submissions, 24%;

Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Shi LHu HJia ZNie YXi YLi ZLiu HChen C(2024)Optimal Designs of 1T1R Structure to Reduce the Transistor IR Drop2024 7th International Conference on Electronics Technology (ICET)10.1109/ICET61945.2024.10672828(254-258)Online publication date: 17-May-2024
https://doi.org/10.1109/ICET61945.2024.10672828
Wu TLiu KXiao CLiu BZhuge QSha E(2020)Multigranularity Space Management Scheme for Accelerating the Write Performance of In-Memory File SystemsIEEE Systems Journal10.1109/JSYST.2020.297567314:4(5429-5440)Online publication date: Dec-2020
https://doi.org/10.1109/JSYST.2020.2975673
Kim JKim YKhan APark S(2019)Understanding the performance of storage class memory file systems in the NUMA architectureCluster Computing10.1007/s10586-018-2833-422:2(347-360)Online publication date: 1-Jun-2019
https://dl.acm.org/doi/10.1007/s10586-018-2833-4
Kim SAbbas YJeon YSokolov AKu BChoi C(2018) Engineering synaptic characteristics of TaO x /HfO 2 bi-layered resistive switching device Nanotechnology10.1088/1361-6528/aad64c29:41(415204)Online publication date: 9-Aug-2018
https://doi.org/10.1088/1361-6528/aad64c
Kim JKim JKhan AKim YPark S(2017)ZonFS: A Storage Class Memory File System with Memory Zone Partitioning on Linux2017 IEEE 2nd International Workshops on Foundations and Applications of Self* Systems (FAS*W)10.1109/FAS-W.2017.159(277-282)Online publication date: Sep-2017
https://doi.org/10.1109/FAS-W.2017.159

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