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Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges

Authors:

Russell Barnes,

Eren KursunAuthors Info & Claims

GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI

Pages 347 - 352

https://doi.org/10.1145/2902961.2903512

Published: 18 May 2016 Publication History

Abstract

3D die stacking and 2.5D interposer design are promising technologies to improve integration density, performance and cost. Current approaches face serious issues in dealing with emerging security challenges such as side channel attacks, hardware trojans, secure IC manufacturing and IP piracy. By utilizing intrinsic characteristics of 2.5D and 3D technologies, we propose novel opportunities in designing secure systems. We present: (i) a 3D architecture for shielding side-channel information; (ii) split fabrication using active interposers; (iii) circuit camouflage on monolithic 3D IC, and (iv) 3D IC-based security processing-in-memory (PIM). Advantages and challenges of these designs are discussed, showing that the new designs can improve existing countermeasures against security threats and further provide new security features.

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Cited By

Pal SMallik AGupta P(2024)System technology co-optimization for advanced integrationNature Reviews Electrical Engineering10.1038/s44287-024-00078-x1:9(569-580)Online publication date: 2-Sep-2024
https://doi.org/10.1038/s44287-024-00078-x
Mustafa YKöse S(2023)Covert Communication Attacks in Chiplet-based 2.5-D Integration Systems2023 IEEE 36th International System-on-Chip Conference (SOCC)10.1109/SOCC58585.2023.10257008(1-5)Online publication date: 5-Sep-2023
https://doi.org/10.1109/SOCC58585.2023.10257008
Zamiri Azar KMardani Kamali HFarahmandi FTehranipoor MZamiri Azar KMardani Kamali HFarahmandi FTehranipoor M(2023)Emergence of Cutting-Edge Technologies on Logic LockingUnderstanding Logic Locking10.1007/978-3-031-37989-5_10(251-277)Online publication date: 23-Sep-2023
https://doi.org/10.1007/978-3-031-37989-5_10
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Index Terms

Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges
1. Hardware
  1. Integrated circuits
    1. 3D integrated circuits
2. Security and privacy
  1. Security in hardware

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Published In

cover image ACM Conferences

GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI

May 2016

462 pages

ISBN:9781450342742

DOI:10.1145/2902961

General Chairs:
Ayse K. Coskun
Boston University, USA
,
Martin Margala
University of Massachusetts, Lowell, USA
,
Program Chairs:
Laleh Behjat
University of Calgary, Canada
,
Jie Han
University of Alberta, Canada

Copyright © 2016 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 18 May 2016

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GLSVLSI '16: Great Lakes Symposium on VLSI 2016

May 18 - 20, 2016

Massachusetts, Boston, USA

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GLSVLSI '16 Paper Acceptance Rate 50 of 197 submissions, 25%;

Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Pal SMallik AGupta P(2024)System technology co-optimization for advanced integrationNature Reviews Electrical Engineering10.1038/s44287-024-00078-x1:9(569-580)Online publication date: 2-Sep-2024
https://doi.org/10.1038/s44287-024-00078-x
Mustafa YKöse S(2023)Covert Communication Attacks in Chiplet-based 2.5-D Integration Systems2023 IEEE 36th International System-on-Chip Conference (SOCC)10.1109/SOCC58585.2023.10257008(1-5)Online publication date: 5-Sep-2023
https://doi.org/10.1109/SOCC58585.2023.10257008
Zamiri Azar KMardani Kamali HFarahmandi FTehranipoor MZamiri Azar KMardani Kamali HFarahmandi FTehranipoor M(2023)Emergence of Cutting-Edge Technologies on Logic LockingUnderstanding Logic Locking10.1007/978-3-031-37989-5_10(251-277)Online publication date: 23-Sep-2023
https://doi.org/10.1007/978-3-031-37989-5_10
Oliveira GBoroumand AGhose SGomez-Luna JMutlu O(2022)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI54635.2022.00060(273-278)Online publication date: Jul-2022
https://doi.org/10.1109/ISVLSI54635.2022.00060
Dofe JRai Saini K(2022)Internet of Things World: A New Security PerspectiveSN Computer Science10.1007/s42979-022-01443-z4:1Online publication date: 1-Nov-2022
https://doi.org/10.1007/s42979-022-01443-z
Dofe JDanesh W(2022)AI-Based Hardware Security Methods for Internet-of-Things ApplicationsFrontiers of Quality Electronic Design (QED)10.1007/978-3-031-16344-9_10(387-414)Online publication date: 6-Sep-2022
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Hajinazar NOliveira GGregorio SFerreira JGhiasi NPatel MAlser MGhose SGómez-Luna JMutlu OSherwood TBerger EKozyrakis C(2021)SIMDRAM: a framework for bit-serial SIMD processing using DRAMProceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3445814.3446749(329-345)Online publication date: 19-Apr-2021
https://dl.acm.org/doi/10.1145/3445814.3446749
Dofe JNguyen ANguyen A(2021)Unified Countermeasures against Physical Attacks in Internet of Things - A survey2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)10.1109/iSES52644.2021.00053(194-199)Online publication date: Dec-2021
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Giannoula CVijaykumar NPapadopoulou NKarakostas VFernandez IGomez-Luna JOrosa LKoziris NGoumas GMutlu O(2021)SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00031(263-276)Online publication date: Feb-2021
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Oliveira GGomez-Luna JOrosa LGhose SVijaykumar NFernandez ISadrosadati MMutlu O(2021)DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement BottlenecksIEEE Access10.1109/ACCESS.2021.31109939(134457-134502)Online publication date: 2021
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