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SAINT: Handling module folding and alignment in fixed-outline floorplans for 3D ICs

Authors:

Yen-Fu ChangAuthors Info & Claims

2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Pages 1 - 7

https://doi.org/10.1145/2966986.2967071

Published: 07 November 2016 Publication History

Abstract

Three-dimensional integrated circuits (3D ICs) offer significant improvements over two-dimensional circuits in several aspects. Classic 3D floorplanning algorithm places each module at one single die. However, power consumption and wirelength of a 3D IC may be further reduced if it contains folding modules or stack modules such as stack memory. Hence, this paper proposes a fixed-outline 3D floorplanning algorithm which can simultaneously handle different kinds of modules such as soft modules, hard modules, folding modules, and stack modules. In order to maintain the shape of a 3D module, our algorithm aligns the sub-modules of a folding (or stack) module such that they have identical coordinates in respective dies. Experimental results have demonstrated efficiency and effectiveness of our approach even in large benchmarks such as IBM circuits.

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[Online]. Available: http://www-01.ibm.com/softwar/commerce/optimization/cplex{###}optimizer/

Cited By

Guan WTang XLu HZhang YZhang Y(2023)A Novel Thermal-Aware Floorplanning and TSV Assignment With Game Theory for Fixed-Outline 3-D ICsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.330959531:11(1639-1652)Online publication date: Nov-2023
https://doi.org/10.1109/TVLSI.2023.3309595
Li XPeng KHuang FZhu W(2023)PeF: Poisson’s Equation-Based Large-Scale Fixed-Outline FloorplanningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321360942:6(2002-2015)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3213609
Lin JTsai TShen R(2023)Routability-Driven Orientation-Aware Analytical Placement for System in Package2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323927(1-8)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323927
Show More Cited By

Index Terms

SAINT: Handling module folding and alignment in fixed-outline floorplans for 3D ICs
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement

Index terms have been assigned to the content through auto-classification.

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2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Nov 2016

946 pages

Copyright © 2016.

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IEEE Press

Publication History

Published: 07 November 2016

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Cited By

Guan WTang XLu HZhang YZhang Y(2023)A Novel Thermal-Aware Floorplanning and TSV Assignment With Game Theory for Fixed-Outline 3-D ICsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.330959531:11(1639-1652)Online publication date: Nov-2023
https://doi.org/10.1109/TVLSI.2023.3309595
Li XPeng KHuang FZhu W(2023)PeF: Poisson’s Equation-Based Large-Scale Fixed-Outline FloorplanningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321360942:6(2002-2015)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3213609
Lin JTsai TShen R(2023)Routability-Driven Orientation-Aware Analytical Placement for System in Package2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323927(1-8)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323927
Huang FLiu DLi XYu BZhu W(2023)Handling Orientation and Aspect Ratio of Modules in Electrostatics-Based Large Scale Fixed-Outline Floorplanning2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323841(1-9)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323841
Lin JChang WHsieh HShyu YChang YLu J(2021)Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D ICIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.310034329:9(1652-1664)Online publication date: Sep-2021
https://doi.org/10.1109/TVLSI.2021.3100343
Lin JChen THsieh HShyu YChang YLu J(2021)Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force ModulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.306266929:5(985-997)Online publication date: May-2021
https://doi.org/10.1109/TVLSI.2021.3062669
Guler AJha N(2020)McPAT-Monolithic: An Area/Power/Timing Architecture Modeling Framework for 3-D Hybrid Monolithic Multicore SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.300272328:10(2146-2156)Online publication date: Oct-2020
https://doi.org/10.1109/TVLSI.2020.3002723
Lin JHuang CYang J(2018)Co-synthesis of floorplanning and powerplanning in 3D ICs for multiple supply voltage designs2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342221(1339-1344)Online publication date: Mar-2018
https://doi.org/10.23919/DATE.2018.8342221
Lin JHuang C(2018)General floorplanning methodology for 3D ICs with an arbitrary bonding style2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342197(1199-1202)Online publication date: Mar-2018
https://doi.org/10.23919/DATE.2018.8342197
Guler AJha N(2018)Hybrid Monolithic 3-D IC FloorplannerIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.283260726:10(1868-1880)Online publication date: Oct-2018
https://doi.org/10.1109/TVLSI.2018.2832607

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