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Circuit partitioning for dynamically reconfigurable FPGAs

Published: 01 February 1999 Publication History
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References

[1]
Steve Trimberger, "Scheduling Designs into a Time- Multiplexed FPGA", International Symposium on Field Programmable Gate Arrays, Feb, 1998.
[2]
Douglas Chang and Malgorzata Marek-Sadowska, "Partitioning Sequential Circuits on dynamically Reconfigurable FPGAs", International Symposium on Field Programmable Gate Arrays, Feb, 1998.
[3]
Douglas Chang and Malgorzata Marek-Sadowska, "Buffer Minimization and Time-multiplexed I/O on Dynamically Reconfigurable FPGAs", International Symposium on Field Programmable Gate Arrays, Feb., t997.
[4]
Sasan Iman, Massoud Pedram, Charles Fabian and Jason Cong, "Finding Uni-Directional Cuts Based on Physical Partitioning and Logic Restructuring", dth International workshop on physical design, 1993.
[5]
J.R. Ford and D.R. Fulkerson, "Flows in Networks", Princeton University Press, 1962.
[6]
N.B. Bhat, K. Chaudhary and E.S. Kuh, "Performanceoriented fully routable dynamic architecture for a field programmable logic device", Memorandum No. UCB/ERL M93/42, university of California, Berkeley, 1993.
[7]
jeremy Brown, Derrick Chen, et al. "DELTA: Prototype for a first- generation dynamically programmable gate array", Transit Note 112, MIT, 1995.
[8]
Andre DeHon, "DPGA-coupled microprocessors: Commodity ICs for the early 21st century", In IEEE Workshop on FPGAs for Custom Computing Machines, 1994.
[9]
D. jones and D.M. Lewis, "A time-multiplexed FPGA architecture for logic emulation", In IEEE Custom Integrated Circuits Conference, 1995.
[10]
R. S. Tsay, E. S. Kuh and C. P. Hsu, "Proud: A seaof-gates placement algorithm.", in Proceedings of the iEEE International Conference on Computer Aided Design, pp318-323, Nov. 1988.
[11]
M. R. Garey and D. S. Johnson, Computers and Intractability: A Guide to the Theory of NP- Completeness, W. H. Freeman and Company, 1979.
[12]
C. M. Fiduccia and R. M. Mattheyses, "A linear-time heuristic for improving network partitions", In Proceedings of the 19th Design Automation Conferences, pp 175-181, June 1982.
[13]
B. W. Kernighan and S. Lin, "An efficient heuristic procedure for partitioning graphs", IEEE Transaction on Computers, pp1064-1068, Nov. 1978.
[14]
Honghua Yang and D. F. Wong, "Efficient Network Flow Based Min-Cut Balanced Partitioning", Proc. IC- CAD, 1994.
[15]
Xilinx, The Programmable Logic Data Book, 1996.
[16]
Huiqun Liu and D. F. Wong, "Network flow based circuit partitioning for time-multiplexed FPGAs", International Conference on Computer Aided Design, San Jose, CA, Nov. 1998.

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cover image ACM Conferences
FPGA '99: Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
February 1999
257 pages
ISBN:1581130880
DOI:10.1145/296399
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 February 1999

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FPGA99: ACM/SIGDA Symposium on Field Programmable Gate Arrays
February 21 - 23, 1999
California, Monterey, USA

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  • (2011)Social games, virtual goodsCommunications of the ACM10.1145/1924421.192442954:4(19-22)Online publication date: 1-Apr-2011
  • (2011)Partial reconfiguration logic synthesis by temporal slicing2011 International Conference on Field-Programmable Technology10.1109/FPT.2011.6132720(1-6)Online publication date: Dec-2011
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