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Memory interfacing and instruction specification for reconfigurable processors

Published: 01 February 1999 Publication History
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References

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R. Jeschke, "An FPGA-Based Reconfigurable Coprocessor for the IBM PC", M.A.Sc. Thesis, University of Toronto, 1994.
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Cited By

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  • (2024)Memory Interfacing in Mechatronics Systems: Constraints and Considerations2024 International Conference on Science, Engineering and Business for Driving Sustainable Development Goals (SEB4SDG)10.1109/SEB4SDG60871.2024.10630195(1-9)Online publication date: 2-Apr-2024
  • (2017)Performance Scalability of Adaptive Processor ArchitectureACM Transactions on Reconfigurable Technology and Systems10.1145/300790210:2(1-22)Online publication date: 11-Apr-2017
  • (2017)Application-Specific ProcessorsHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_13-1(1-33)Online publication date: 8-Apr-2017
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cover image ACM Conferences
FPGA '99: Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
February 1999
257 pages
ISBN:1581130880
DOI:10.1145/296399
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 February 1999

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Author Tags

  1. FPGA
  2. memory coherence
  3. memory interfacing
  4. reconfigurable computer
  5. reconfigurable processor

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FPGA99
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FPGA99: ACM/SIGDA Symposium on Field Programmable Gate Arrays
February 21 - 23, 1999
California, Monterey, USA

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Cited By

View all
  • (2024)Memory Interfacing in Mechatronics Systems: Constraints and Considerations2024 International Conference on Science, Engineering and Business for Driving Sustainable Development Goals (SEB4SDG)10.1109/SEB4SDG60871.2024.10630195(1-9)Online publication date: 2-Apr-2024
  • (2017)Performance Scalability of Adaptive Processor ArchitectureACM Transactions on Reconfigurable Technology and Systems10.1145/300790210:2(1-22)Online publication date: 11-Apr-2017
  • (2017)Application-Specific ProcessorsHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_13-1(1-33)Online publication date: 8-Apr-2017
  • (2017)Application-Specific ProcessorsHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_13(377-409)Online publication date: 27-Sep-2017
  • (2015)Reconfigurable Computing ArchitecturesProceedings of the IEEE10.1109/JPROC.2014.2386883103:3(332-354)Online publication date: Mar-2015
  • (2011)Concepts, architectures, and run-time systems for efficient and adaptive reconfigurable processors2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)10.1109/AHS.2011.5963920(80-87)Online publication date: Jun-2011
  • (2010)Selective instruction set muting for energy-aware adaptive processorsProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133505(353-360)Online publication date: 7-Nov-2010
  • (2010)Selective instruction set muting for energy-aware adaptive processors2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2010.5653636(353-360)Online publication date: Nov-2010
  • (2010)Modern development methods and tools for embedded reconfigurable systemsIntegration, the VLSI Journal10.1016/j.vlsi.2009.06.00243:1(1-33)Online publication date: 1-Jan-2010
  • (2010)Improving Adaptability and Per-Core Performance of Many-Core Processors Through ReconfigurationInternational Journal of Parallel Programming10.1007/s10766-010-0128-338:3-4(203-224)Online publication date: 23-Jan-2010
  • Show More Cited By

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