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A scalable lock-free hash table with open addressing

Published: 27 February 2016 Publication History

Abstract

Concurrent data structures synchronized with locks do not scale well with the number of threads. As more scalable alternatives, concurrent data structures and algorithms based on widely available, however advanced, atomic operations have been proposed. These data structures allow for correct and concurrent operations without any locks. In this paper, we present a new fully lock-free open addressed hash table with a simpler design than prior published work. We split hash table insertions into two atomic phases: first inserting a value ignoring other concurrent operations, then in the second phase resolve any duplicate or conflicting values.
Our hash table has a constant and low memory usage that is less than existing lock-free hash tables at a fill level of 33% and above. The hash table exhibits good cache locality. Compared to prior art, our hash table results in 16% and 15% fewer L1 and L2 cache misses respectively, leading to 21% fewer memory stall cycles. Our experiments show that our hash table scales close to linearly with the number of threads and outperforms, in throughput, other lock-free hash tables by 19%.

References

[1]
Papi. http://icl.cs.utk.edu/papi/. Retrieved: 2015-09-12.
[2]
S. Feldman, P. LaBorde, and D. Dechev. Concurrent multi-level arrays: Wait-free extensible hash maps. in Proceedings - International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2013.
[3]
T. Harris. A pragmatic implementation of non-blocking linked-lists. in Proceedings of the 15th International Conference on Distributed Computing, 2001.
[4]
M. Michael. High performance dynamic lock-free hash tables and list-based sets. in Proceedings of the Fourteenth Annual ACM Symposium on Parallel Algorithms and Architectures, 2002.
[5]
C. Purcell and T. Harris. Non-blocking hatables with open addressing. University of Cambridge Technical Report, 2005.

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cover image ACM Conferences
PPoPP '16: Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
February 2016
420 pages
ISBN:9781450340922
DOI:10.1145/2851141
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

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Published: 27 February 2016

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