Adaptive Isolation for Predictable MPSoC Stream Processing

Resource sharing and interferences of multiple threads of one, but even worse between multiple application programs running concurrently on a Multi-Processor System-on-a-Chip (MPSoC) today make it very hard to provide any timing or throughput-critical applications with time bounds. Additional interferences result from the interaction of OS functions such as thread multiplexing and scheduling as well as complex resource (e.g., cache) reservation protocols used heavily today. Finally, dynamic power and temperature management on a chip might also throttle down processor speed at arbitrary times leading to additional variations and jitter in execution time. This may be intolerable for many safety-critical applications such as medical imaging or automotive driver assistance systems.

Static solutions to provide the required isolation by allocating distinct resources to safety-critical applications may not be feasible for reasons of cost and due to the lack of efficiency and inflexibility. Also, shutting off or restricting temperature and power management might not be tolerable.

In this keynote, we propose new techniques for adaptive isolation of resources including processor, I/O, memory as well as communication resources on demand on an MPSoC based on the paradigm of Invasive Computing. In Invasive Computing, a programmer may specify bounds on the execution quality of a program or even single segments of a program followed by an invade command. This system returns a constellation of exclusive resources called a claim that is subsequently used in a by-default non-shared way until being released again by the invader. Through this principle, it becomes possible to isolate applications automatically and in an on-demand manner. In invasive computing, isolation is supported on all levels of hardware and software including an invasive OS.

In case of an abundant number of cores available on an MPSoC today, the problem still becomes how to find suitable claims that will guarantee a performance bound in a negligible amount of time?

For a broad class of streaming applications, we propose a combined static/dynamic approach based on a static design space exploration phase to extract a set of satisfying claim characteristics for which program execution is guaranteed to stay within the desired performance bounds.

For a class of compositional and heterogeneous MPSoC systems, only very little information must then be passed to the OS for run-time claim search in the form of so-called CCGs (claim constraint graphs). A special role here plays a compositional Network-on-a-Chip (NoC) architecture that allows to invade guaranteed bandwith between processor, memory and I/O tiles independently from other applications. We demonstrate the above concepts for a complex object detection application algorithm chain taken from robot vision to show jitter-minimized implementations become possible, even for statically unknown arrivals of other concurrent applications.